Apparatus and method for generating clock signal

Abstract

The invention is related to an apparatus and a method for generating an output clock. The method comprises: receiving a transmitted signal comprising at least one data signal and at least one synchronized signal; producing a reference signal according to the synchronization signal; counting the first reference signal according to a free-run clock outputted by a free-run clock generator to produce a counter signal; and generating the output clock according to the counter signal and the free-run clock.

1 . A method for generating an output clock, comprising: 
 producing a reference signal according to a synchronization signal of a received signal;    measuring the reference clock according to a clock signal to generate a measured value; and    producing the output clock according to the measured value and the clock signal.    
   
   
       2 . The method of  claim 1 , wherein the measuring step comprises: 
 counting the reference clock according to the clock signal to generate the measured value.    
   
   
       3 . The method of  claim 1 , wherein the period of the reference signal is a multiple of the period of the synchronization signal.  
   
   
       4 . The method of  claim 1 , wherein the reference signal is generated according to the synchronization signal and a control signal.  
   
   
       5 . The method of  claim 1 , wherein the frequencies of the reference signal and the synchronization signal are substantially the same.  
   
   
       6 . The method of  claim 1 , wherein the reference signal is corresponding to the synchronization signal.  
   
   
       7 . The method of  claim 1 , wherein the clock signal and the synchronization signal are independent.  
   
   
       8 . An apparatus for generating an output clock, comprising: 
 a control logic utilized for receiving a transmitted signal having at least one data segment and at least one synchronization signal, and generating a reference signal according to the synchronization signal;    a measuring unit, coupled to the control logic, for generating a measured signal according to the reference signal and a clock signal; and    an output unit, coupled to the measuring unit, for generating the output clock according to the measured signal and the clock signal.    
   
   
       9 . The apparatus of  claim 8 , further comprising: a free-run clock generator for generating the clock signal.  
   
   
       10 . The apparatus of  claim 8 , wherein the period of the synchronization signal is a multiple of the period of the reference signal.  
   
   
       11 . The apparatus of  claim 8 , wherein the output circuit comprises a storage unit for storing the measured signal.  
   
   
       12 . The apparatus of  claim 8 , wherein the control logic modifies the period of the reference signal according to a control signal.  
   
   
       13 . The apparatus of  claim 8 , wherein the measured signal is a non-integer.  
   
   
       14 . The apparatus of  claim 8 , wherein the clock signal and the synchronization signal are independent.  
   
   
       15 . An apparatus for generating an output signal, comprising: 
 a measuring unit utilized for measuring a serial signal according to a clock signal to generate a measured signal; and    an output circuit, coupled to the first counter, for receiving the measured signal and the clock signal and producing the output signal according to the measured signal and the clock signal, wherein the serial signal is corresponding to the output signal.    
   
   
       16 . The apparatus of  claim 15 , wherein the measuring unit comprises a first counter.  
   
   
       17 . The apparatus of  claim 16 , wherein the output unit comprises a second counter.  
   
   
       18 . The apparatus of  claim 15 , wherein the output circuit comprising a storage unit for storing the measured signal.  
   
   
       19 . The apparatus of the  claim 15 , wherein the measured signal is a non-integer.  
   
   
       20 . The apparatus of  claim 15 , wherein the clock signal and the serial signal are independent.