Reduced size semiconductor package with stacked dies

Abstract

A semiconductor package comprising a plurality of leads. Each of the leads defines opposed first and second surfaces, and a third surface which is also disposed in opposed relation to the second surface. The first surface is oriented between the second and third surfaces. The semiconductor package further comprises first and second semiconductor dies which each define opposed first and second surfaces. Disposed on the first surface of the first semiconductor die are a plurality of bond pads, with bond pads also being disposed on the second surface of the semiconductor die. The first surface of the first semiconductor die is attached to the second surface of each of the leads, with the first surface of the second semiconductor die being attached to the second surface of the first semiconductor die. A plurality of conductive connectors or wires electrically connect the bond pads of the first and second semiconductor dies to respective ones of the leads. An encapsulating portion is applied to and at least partially encapsulates the leads, the first and second semiconductor dies, and the conductive connectors.

1 - 18 . (canceled)  
     
     
         19 . A semiconductor package comprising: 
 a plurality of leads, each of the leads defining: 
 a first surface;  
 a second surface disposed in opposed relation to the first surface; and  
 a third surface disposed in opposed relation to the second surface, the first surface being oriented between the second and third surfaces;  
   at least one semiconductor die defining opposed first and second surfaces and including a plurality of bond pads disposed on the first surface thereof, portions of the first surface of the semiconductor die being directly attached to the second surface of each of the leads such that at least some of the bond pads of the semiconductor die are located between and laterally adjacent to a respective pair of the leads so that the bond pads of the semiconductor die do not contact the second surface of any one of the leads;    a plurality of conductive connectors electrically connecting the bond pads of the semiconductor die to at least some of the leads; and    an encapsulating portion applied to and at least partially encapsulating the leads, the semiconductor die, and the conductive connectors.    
     
     
         20 . The semiconductor package of  claim 19  wherein the conductive connectors comprise conductive wires.  
     
     
         21 . The semiconductor package of  claim 19  wherein: 
 the conductive connectors comprise conductive wires; and    at least some of the bond pads of the semiconductor die are electrically connected to respective ones of the first surfaces of the leads by the conductive wires.    
     
     
         22 . The semiconductor package of  claim 19  further comprising: 
 a die paddle defining opposed top and bottom surfaces, the leads being disposed about the die paddle;    the first surface of the semiconductor die further being attached to the top surface of the die paddle.    
     
     
         23 . The semiconductor package of  claim 22  wherein the first surface of the semiconductor die is attached to the second surface of each of the leads and to the top surface of the die paddle by a first bonding means.  
     
     
         24 . The semiconductor package of  claim 22  wherein: 
 the die paddle is formed to have a die paddle thickness;    each of the leads is formed to have a lead thickness between the second and third surfaces thereof; and    the die paddle thickness is substantially equal to the lead thickness.    
     
     
         25 . The semiconductor package of  claim 22  wherein the encapsulating portion is applied to the die paddle such that the bottom surface of the die paddle is exposed in the encapsulating portion.  
     
     
         26 . The semiconductor package of  claim 25  wherein the encapsulating portion is applied to the leads such that the third surface of each of the leads is exposed in the encapsulating portion.  
     
     
         27 . The semiconductor package of  claim 19  wherein the encapsulating portion is applied to the leads such that the third surface of each of the leads is exposed in the encapsulating portion.  
     
     
         28 . The semiconductor package of  claim 19  wherein: 
 the semiconductor die defines a peripheral edge; and    at least some of the conductive connectors electrically connecting the bond pads of the semiconductor die to the leads are oriented inwardly relative to the peripheral edge of the semiconductor die.    
     
     
         29 . A semiconductor package comprising: 
 a plurality of leads;    at least one semiconductor die including a plurality of bond pads disposed thereon, the semiconductor die being directly attached to each of the leads such that at least some of the bond pads of the semiconductor die are located between and laterally adjacent to a respective pair of the leads so that the bond pads of the semiconductor die do not contact any of the leads;    means for electrically connecting at least some of the bond pads of the semiconductor die to at least some of the leads; and    an encapsulating portion applied to and at least partially encapsulating the leads, the semiconductor die, and the electrical connection means.    
     
     
         30 . The semiconductor package of  claim 29  wherein the electrical connection means comprises conductive wires.  
     
     
         31 . The semiconductor package of  claim 30  wherein: 
 each of the leads defines opposed first and second surfaces and a third surface which is opposed to the second surface, the first surface being oriented between the second and third surfaces;    at least some of the bond pads of the semiconductor die are electrically connected to respective ones of the first surfaces of the leads by the conductive wires.    
     
     
         32 . The semiconductor package of  claim 31  wherein the encapsulating portion is applied to the leads such that the third surface of each of the leads is exposed in the encapsulating portion.  
     
     
         33 . The semiconductor package of  claim 29  further comprising: 
 a die paddle, the leads being disposed about the die paddle;    the first semiconductor die being attached to the die paddle.    
     
     
         34 . The semiconductor package of  claim 33  wherein: 
 the die paddle defines opposed top and bottom surfaces, with the semiconductor die being attached to the top surface of the die paddle; and    the encapsulating portion is applied to the die paddle such that the bottom surface of the die paddle is exposed in the encapsulating portion.