Encapsulated semiconductor components and methods of fabrication

Abstract

A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A method for fabricating the component includes the steps of providing a substrate containing multiple dice, forming trenches on the substrate proximate to peripheral edges of the dice, and depositing a polymer material into the trenches. In addition, the method includes the steps of planarizing the back side of the substrate to contact the polymer filled trenches, and cutting through the polymer trenches to singulate the components from the substrate. Prior to the singulating step the components can be tested and burned-in while they remain on the substrate.

1 - 152 . (canceled)  
     
     
         153 . A semiconductor component comprising: 
 a thinned semiconductor die having a circuit side, a thinned back side and a plurality of peripheral edges;    a first polymer layer covering the circuit side and the edges; and    a second polymer layer covering the back side.    
     
     
         154 . The semiconductor component of  claim 153  further comprising a plurality of die contacts on the die, and a plurality of contact bumps on the die contacts embedded in the first polymer layer.  
     
     
         155 . The semiconductor component of  claim 154  further comprising a plurality of terminal contacts on the contact bumps.  
     
     
         156 . The semiconductor component of  claim 154  wherein the terminal contacts comprise bumps or balls in a grid array, or planar pads configured as an edge connector.  
     
     
         157 . The semiconductor component of  claim 154  wherein the second polymer layer is opaque to radiation at a selected wavelength.  
     
     
         158 . The semiconductor component of  claim 154  wherein the second polymer layer comprises a wafer level underfill tape.  
     
     
         159 . The semiconductor component of  claim 154  wherein the second polymer layer comprises parylene.  
     
     
         160 . The semiconductor component of  claim 154  wherein the second polymer layer comprises a photoresist.  
     
     
         161 . The semiconductor component of  claim 154  wherein the second polymer layer comprises a tape.  
     
     
         162 . The semiconductor component of  claim 154  wherein the second polymer layer comprises a stereographic imageable resist.  
     
     
         163 . The method of  claim 154  further comprising etching the substrate following the thinning step such that the substrate is recessed with respect to the portions of the polymer filled trenches.  
     
     
         164 . The method of  claim 163  wherein a thickness of the substrate following the etching step is about 10 μm to 250 μm.  
     
     
         165 . The semiconductor component of  claim 154  further comprising a polymer tape attached to the thinned back side which is opaque to radiation at a selected wavelength, and a laser marking on the polymer tape.  
     
     
         166 . The semiconductor component of  claim 154  further comprising a conductive via in the thinned substrate.  
     
     
         167 . The semiconductor component of  claim 166  wherein the conductive via comprises a conductive member exposed with respect to the substrate to provide a pin terminal contact.  
     
     
         168 . The semiconductor component of  claim 166  wherein the conductive via comprises a conductive member, a conductor on the back side and a terminal contact on the back side in electrical communication with the conductivity region.  
     
     
         169 . The semiconductor component of  claim 166  wherein the conductive via comprises a reverse bias junction.  
     
     
         170 . A semiconductor component comprising: 
 a thinned semiconductor die having a circuit side, a back side, four peripheral edges, and a plurality of die contacts;    a plurality of contact bumps on the die contacts;    a first polymer layer covering the circuit side, the contact bumps and the peripheral edges;    a second polymer layer covering the back side; and    a plurality of terminal contacts on the contact bumps.    
     
     
         171 . The semiconductor component of  claim 170  wherein the contact bumps and the first polymer layer are planarized to a same surface.  
     
     
         172 . The semiconductor component of  claim 170  wherein the contact bumps comprise metal bumps.  
     
     
         173 . The semiconductor component of  claim 170  wherein the terminal contacts comprise conductive bumps or balls.  
     
     
         174 . The semiconductor component of  claim 170  wherein the first polymer layer has a planarized first surface.  
     
     
         175 . The semiconductor component of  claim 170  wherein the second polymer layer has a planarized second surface.  
     
     
         176 . The semiconductor component of  claim 170  further comprising a plurality of conductive vias in electrical communication with the die contacts and with the terminal contacts.  
     
     
         177 . The semiconductor component of  claim 176  further comprising a plurality of second die contacts on the second polymer layer in electrical communication with the conductive vias.  
     
     
         178 . The semiconductor component of  claim 170  wherein the second polymer layer comprises a photopolymer.  
     
     
         179 . The semiconductor component of  claim 170  wherein the second polymer layer comprises a wafer level underfill.  
     
     
         180 . A semiconductor component comprising: 
 a thinned semiconductor die having a circuit side, a back side and four peripheral edges;    a circuit side polymer layer covering the circuit side;    a plurality of edge polymer layers covering the four peripheral edges, the edge polymer layers and the circuit side polymer layer comprising a continuous layer of material, the edge polymer layers comprising portions of polymer filled trenches; and    a back side polymer layer covering the back side.    
     
     
         181 . The semiconductor component of  claim 180  further comprising a plurality of die contacts on the die, and a plurality of contact bumps on the die contacts embedded in the circuit side polymer layer.  
     
     
         182 . The semiconductor component of  claim 180  further comprising a plurality of die contacts on the die, and a plurality of planarized contact bumps on the die contacts embedded in the circuit side polymer layer and planarized to a surface thereof.  
     
     
         183 . The semiconductor component of  claim 180  further comprising a plurality of terminal contacts on the contact bumps.  
     
     
         184 . The semiconductor component of  claim 180  further comprising a plurality of conductive vias through the die  
     
     
         185 . The semiconductor component of  claim 180  further comprising a plurality of conductive vias through the die including exposed portions configured as pins.  
     
     
         186 . The semiconductor component of  claim 180  further comprising a plurality of conductive vias through the die including tip portions, a plurality of conductors on the back side in electrical communication with the conductors, and a plurality of terminal contacts on the back side in electrical communication with the tip portions.  
     
     
         187 . The semiconductor component of  claim 180  wherein the back side polymer layer is opaque to radiation at a selected wave length.  
     
     
         188 . The semiconductor component of  claim 180  wherein the back side polymer layer comprises a wafer level underfill.  
     
     
         189 . A semiconductor component comprising: 
 a semiconductor wafer having a circuit side and a back side, the wafer comprising a thinned substrate and a plurality of semiconductor dice on the thinned substrate separated by streets;    a plurality of polymer filled trenches in the thinned substrate in the streets;    a planarized circuit side polymer layer on the circuit side; and    a planarized back side polymer layer in the back side.    
     
     
         190 . The semiconductor component of  claim 189  further comprising a plurality of die contacts on the dice, and a plurality of contact bumps on the die contacts embedded in the planarized circuit side polymer layer.  
     
     
         191 . The semiconductor component of  claim 190  further comprising a plurality of terminal contacts on the contact bumps.  
     
     
         192 . The semiconductor component of  claim 191  further comprising a plurality of conductive vias in the substrate in electrical communication with the die contacts and with the terminal contacts.  
     
     
         193 . The semiconductor component of  claim 191  wherein the terminal contacts comprise bumps or balls in a grid array.  
     
     
         194 . The semiconductor component of  claim 191  wherein the terminal contacts are configured as an edge connector.  
     
     
         195 . The semiconductor component of  claim 191  further comprising a plurality of second terminal contacts on planarized back side polymer layer in electrical communication with the conductive vias.  
     
     
         196 . A semiconductor component comprising: 
 a thinned semiconductor die having a circuit side, a back side, four peripheral edges, and a plurality of die contacts on the circuit side;    a first polymer layer covering the circuit side and the peripheral edges;    a plurality of conductive vias in the die in electrical communication with the die contacts;    a second polymer layer covering the back side;    and a plurality of terminal contacts in electrical communication with the conductive vias and the die contacts.    
     
     
         197 . The semiconductor component of  claim 196  wherein the terminal contacts are on the circuit side.  
     
     
         198 . The semiconductor component of  claim 196  wherein the terminal contacts are on the back side.  
     
     
         199 . The semiconductor component of  claim 196  wherein the terminal contacts are on both the circuit side and the back side.  
     
     
         200 . The semiconductor component of  claim 196  wherein the terminal contacts are offset from the conductive vias.  
     
     
         201 . The semiconductor component of  claim 196  wherein each conductive via comprise a reverse bias junction.  
     
     
         202 . The semiconductor component of  claim 196  wherein the terminal contacts are configured as an edge connector.  
     
     
         203 . The semiconductor component of  claim 196  wherein the terminal contacts are bonded to contact bumps on the die contacts.  
     
     
         204 . The semiconductor component of  claim 196  wherein the terminal contacts are bonded to planarized contact bumps on the die contacts planarized to a surface of the first polymer layer.  
     
     
         205 . The semiconductor component of  claim 196  wherein the conductive vias comprise openings in the die, insulating layers on the openings, and a conductive material in the openings.  
     
     
         206 . The semiconductor component of  claim 196  wherein the conductive vias comprise portions of the die implanted with a dopant.  
     
     
         207 . The semiconductor component of  claim 196  wherein the terminal contacts comprise portions of the conductive vias configured as pin contacts.  
     
     
         208 . The semiconductor component of  claim 196  wherein the terminal contacts comprise balls or bumps in an area array.  
     
     
         209 . A semiconductor component comprising: 
 a thinned semiconductor die having a circuit side and a thinned back side;    a polymer layer covering the circuit side; and    a heat sink attached to the thinned back side.    
     
     
         210 . The semiconductor component of  claim 209  further comprising a thermally conductive adhesive attaching the heat sink to the thinned back side.  
     
     
         211 . The semiconductor component of  claim 209  wherein the die comprise a plurality of edges and the polymer layer covers the edges.  
     
     
         212 . The semiconductor component of  claim 209  wherein the die comprises a plurality of die contacts on the circuit side, contact bumps on the die contact and terminal contacts on the contact bumps.  
     
     
         213 . The semiconductor component of  claim 209  wherein the die comprises a plurality of die contacts on the circuit side, planarized contact bumps on the die contact and terminal contacts on the planarized contact bumps.  
     
     
         214 . A semiconductor component comprising: 
 a thinned semiconductor die having a circuit side and a thinned back side;    a polymer layer covering the circuit side;    a polymer tape attached to the thinned back side; and    a marking in the polymer tape.    
     
     
         215 . The semiconductor component of  claim 214  wherein the marking comprises a laser marking and the polymer tape is opaque to radiation of a selected wave length.  
     
     
         216 . The semiconductor component of  claim 214  wherein the die comprise a plurality of edges and the polymer layer covers the edges.  
     
     
         217 . The semiconductor component of  claim 214  wherein the die comprises a plurality of die contacts on the circuit side, contact bumps on the die contacts, and terminal contacts on the contact bumps.  
     
     
         218 . The semiconductor component of  claim 214  wherein the die comprises a plurality of die contacts on the circuit side, planarized contact bumps on the die contacts, and terminal contacts on the planarized contact bumps.  
     
     
         219 . The semiconductor component of  claim 214  wherein the polymer tape comprises a wafer level underfill.  
     
     
         220 . A semiconductor component comprising: 
 a semiconductor die having a circuit side, a back side, four peripheral edges, and an array of die contacts on the circuit side;    a polymer layer covering the circuit side;    a protective coating covering the edges and the back side; and    a plurality of terminal contacts on the die contacts.    
     
     
         221 . The semiconductor component of  claim 220  further comprising a plurality of contact bumps on the die contacts.  
     
     
         222 . The semiconductor component of  claim 220  further comprising a plurality of planarized contact bumps on the die contacts planarized to a surface of the polymer layer.  
     
     
         223 . The semiconductor component of  claim 220  wherein the protective coating comprises parylene.  
     
     
         224 . The semiconductor component of  claim 220  wherein the terminal contacts comprise bumps or balls in a grid array.  
     
     
         225 . The semiconductor component of  claim 220  wherein the terminal contacts are configured as an edge connector.  
     
     
         226 . The semiconductor component of  claim 220  wherein the peripheral edges comprise etched surfaces.  
     
     
         227 . A semiconductor component comprising: 
 a thinned semiconductor die having a circuit side, a back side, four peripheral edges, and a plurality of die contacts;    a first polymer layer covering the circuit side comprising a first polymer material; and    a plurality of second polymer layers covering the peripheral edges comprising a second polymer material.    
     
     
         228 . The semiconductor component of  claim 227  further comprising a plurality of contact bumps on the die contacts embedded in the first polymer layers and a plurality of terminal contacts on the contact bumps.  
     
     
         229 . The semiconductor component of  claim 228  wherein the contact bumps and the first polymer layer are planarized to a same surface.  
     
     
         230 . The semiconductor component of  claim 228  wherein the contact bumps comprise conductive bumps or balls.  
     
     
         231 . The semiconductor component of  claim 228  wherein the second polymer layers comprise a photoimageable resist.  
     
     
         232 . The semiconductor component of  claim 228  wherein the second polymer layer comprise a stereo lithographic imageable material.  
     
     
         233 . A semiconductor component comprising: 
 a thinned semiconductor die having a circuit side, a back side, and a plurality of die contacts on the circuit side;    a plurality of conductive vias in the die in electrical communication with the die contacts;    and a plurality of terminal contacts in electrical communication with the conductive vias and the die contacts comprising pin contacts.    
     
     
         234 . The semiconductor component of  claim 233  wherein the pin contacts comprise conductive portions of the conductive vias.  
     
     
         235 . The semiconductor component of  claim 233  wherein the pin contacts comprise a pin grid array.  
     
     
         236 . The semiconductor component of  claim 233  wherein each conductive via comprises a reverse junction bias.  
     
     
         237 . The semiconductor component of  claim 233  further comprising a second polymer layer covering the back side.  
     
     
         238 . The semiconductor component of  claim 233  wherein the thinned die has a thickness of from about 10 μm to 250 μm.  
     
     
         239 . The semiconductor component of  claim 233  further comprising a first polymer layer covering at least the circuit side.  
     
     
         240 . The semiconductor component of  claim 239  wherein the first polymer layer covers edges of the die.  
     
     
         241 . The semiconductor component of  claim 239  further comprising a second polymer layer covering the back side.  
     
     
         242 . A semiconductor component comprising: 
 a thinned semiconductor die having a circuit side, a back side, and a plurality of die contacts on the circuit side;    a plurality of conductive vias in the die in electrical communication with the die contacts;    and a plurality of terminal contacts in electrical communication with the conductive vias and the die contacts comprising tip portions projecting from the thinned semiconductor die;    a plurality of conductors in electrical communication with the tip portions; and    a plurality of terminal contacts in electrical communication with the conductors.    
     
     
         243 . The semiconductor component of  claim 242  wherein the tip portions comprise a conductive material.  
     
     
         244 . The semiconductor component of  claim 242  wherein the terminal contacts comprise ball or bumps in a grid array.  
     
     
         245 . The semiconductor component of  claim 242  wherein the conductive vias comprise reverse bias junctions.  
     
     
         246 . The semiconductor component of  claim 242  further comprising a first polymer layer covering at least the circuit side.  
     
     
         247 . The semiconductor component of  claim 246  wherein the first polymer layer covers edges of the die.  
     
     
         248 . The semiconductor component of  claim 246  further comprising a second polymer layer covering the back side.  
     
     
         249 . A system comprising: 
 a substrate; and    a component on the substrate comprising: 
 a thinned semiconductor die having a circuit side, a back side and a plurality of peripheral edges;  
 a first polymer layer covering the circuit side and the edges;  
 a second polymer layer covering the back side; and  
 a plurality of terminal contacts on the first polymer layer in electrical communication with the die and bonded to the substrate.  
   
     
     
         250 . The system of  claim 249  further comprising a plastic body encapsulating the substrate and the component.  
     
     
         251 . The system of  claim 249  further comprising a plurality of planarized contact bumps on the die embedded in the first polymer layer.  
     
     
         252 . The system of  claim 249  wherein the substrate comprises a plurality of terminal leads in electrical communication with the terminal contacts.  
     
     
         253 . The system of  claim 249  wherein the substrate comprises an edge connector in electrical communication with the terminal contacts.  
     
     
         254 . The system of  claim 249  wherein the system comprises a system in a package.  
     
     
         255 . The system of  claim 249  wherein the substrate comprises a module substrate and the system comprises a multi chip module.  
     
     
         256 . A system in a package comprising: 
 a substrate comprising a plurality of terminal leads;    a component mounted to the substrate, the component comprising: 
 a thinned semiconductor die having a circuit side, a back side, four peripheral edges, and an area array of die contacts;  
 a plurality of contact bumps on the die contacts;  
 a first polymer layer covering the circuit side, the contact bumps and the peripheral edges;  
 a second polymer layer covering the back side; and  
 a plurality of terminal contacts on the contact bumps in electrical communication with the terminal leads; and  
   a plastic body encapsulating the substrate and the component.    
     
     
         257 . The system of  claim 256  wherein the terminal contacts comprise bumps or balls and the component is flip chip mounted to the substrate.  
     
     
         258 . The system of  claim 256  wherein the terminal contacts comprise an edge connector and the component is edge connector mounted to the substrate.  
     
     
         259 . A stacked semiconductor system comprising: 
 a first semiconductor component comprising: 
 a thinned semiconductor die having a circuit side, a back side, four peripheral edges, and an array of die contacts on the circuit side;  
 a plurality of contact bumps on the die contacts;  
 a first polymer layer covering the circuit side, the peripheral edges, and portions of the contact bumps;  
 a plurality of conductive vias in the die in electrical communication with the contact bumps;  
 a second polymer layer covering the back side; and  
 a plurality of terminal contacts on the back side in electrical communication with the conductive vias; and  
   a second semiconductor component substantially identical to the first semiconductor component comprising a plurality of second terminal contacts bonded to the contact bumps.    
     
     
         260 . The stacked semiconductor system of  claim 259  wherein the conductive vias comprise openings in the die, insulating layers on the openings, and a conductive material in the openings.  
     
     
         261 . The stacked semiconductor system of  claim 259  wherein the terminal contacts comprise balls or bumps in a grid array.