US2005146647A1PendingUtilityA1

Pixel structure and exposure method thereof

Assignee: HANNSTAR DISPLAY CORPPriority: Jan 6, 2004Filed: Jul 30, 2004Published: Jul 7, 2005
Est. expiryJan 6, 2024(expired)· nominal 20-yr term from priority
G02F 1/13624G02F 1/136213G02F 1/13625
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Claims

Abstract

The present invention provides a pixel structure and exposure method thereof. This present invention divides these devices that influence the optical characteristic of the pixel region into two parts. Each part is located in a sub-pixel region of the pixel region. Different photolithography process rounds are performed in the different sub-pixel regions.

Claims

exact text as granted — not AI-modified
1 . A pixel structure of a liquid crystal display, said pixel structure comprising: 
 a plurality of scan lines located on a substrate and arranged in a first direction and parallel to each other; and    a plurality of video data lines located on said substrate and arranged parallel to each other and arranged in a second direction to cross said plurality of scan lines, wherein any adjacent scan lines and any adjacent video data lines define a pixel region, each pixel region comprising: 
 a pixel electrode;  
 a plurality of switching transistors, wherein gates of said switching transistors are coupled to said scan line defining said pixel region, and said video data line defining said pixel region is coupled to said pixel electrode through said switching transistors; and  
 a storage capacitor coupling to said video data line defining said pixel region through said switching transistors.  
   
   
   
       2 . The pixel structure of  claim 1 , wherein said pixel electrode is formed with ITO or IZO material.  
   
   
       3 . The pixel structure of  claim 1 , wherein said switching transistors are formed by different photolithography process rounds.  
   
   
       4 . The pixel structure of  claim 1 , wherein said switching transistors are formed by different exposure process rounds.  
   
   
       5 . The pixel structure of  claim 1 , wherein said pixel region further comprises a common electrode.  
   
   
       6 . A pixel structure of a liquid crystal display, said pixel structure comprising: 
 a plurality of scan lines located on a substrate and arranged in a first direction and parallel to each other; and    a plurality of video data line located on said substrate and arranged parallel to each other and arranged in a second direction to cross said plurality of scan lines, wherein any adjacent scan lines and any adjacent video data lines define a pixel region, each pixel region comprising: 
 a pixel electrode;  
 a switching transistor, wherein a gate of said switching transistor is coupled to said scan line defining said pixel region, and said video data line defining said pixel region is coupled to said pixel electrode through said switching transistor; and  
 a plurality of storage capacitor coupling to said video data line defining said pixel region through said switching transistor.  
   
   
   
       7 . The pixel structure of  claim 6 , wherein said pixel electrode is formed with ITO or IZO material.  
   
   
       8 . The pixel structure of  claim 6 , wherein said storage capacitors are formed by different exposure process rounds.  
   
   
       9 . The pixel structure of  claim 6 , wherein the electrodes of said storage capacitors are composed of said pixel electrode and said scan line.  
   
   
       10 . The pixel structure of  claim 6 , wherein said pixel region further comprise a common electrode.  
   
   
       11 . The pixel structure of  claim 10 , wherein the electrodes of said storage capacitors are composed of said pixel electrodes and said common electrode.  
   
   
       12 . A pixel structure of a liquid crystal display, said pixel structure comprising: 
 a plurality of scan lines located on a substrate and arranged in a first direction and parallel to each other; and    a plurality of video data lines located on said substrate and arranged parallel to each other and arranged in a second direction to cross said plurality of scan lines, wherein any adjacent scan lines and any adjacent video data lines define a pixel region, each pixel region comprising: 
 a pixel electrode;  
 a plurality of switching transistors, wherein gates of said switching transistors are coupled to said scan line defining said pixel region, and said video data line defining said pixel region is coupled to said pixel electrode through said switching transistors; and  
 a plurality of storage capacitor coupling to said video data line defining said pixel region through said switching transistors.  
   
   
   
       13 . The pixel structure of  claim 12 , wherein said pixel electrode is formed with ITO or IZO material.  
   
   
       14 . The pixel structure of  claim 12 , wherein said switching transistors are formed by different exposure process rounds.  
   
   
       15 . The pixel structure of  claim 12 , wherein said storage capacitors are formed by different exposure process rounds.  
   
   
       16 . The pixel structure of  claim 12 , wherein each switching transistor and each storage capacitor can be formed in a same exposure process round.  
   
   
       17 . The pixel structure of  claim 12 , wherein electrodes of said storage capacitors are composed of said pixel electrode and said scan line.  
   
   
       18 . The pixel structure of  claim 12 , wherein said pixel region further comprises a common electrode.  
   
   
       19 . The pixel structure of  claim 18 , wherein electrodes of said storage capacitors are composed of said pixel electrodes and said common electrode.  
   
   
       20 . A exposure method for forming a pixel structure of a liquid crystal display, said exposure method comprising: 
 determining devices related to a shot mura defect in a pixel region;    performing photolithography process to form said devices, respectively.    
   
   
       21 . The exposure method of  claim 20 , wherein said devices are switching transistors of said liquid crystal display.  
   
   
       22 . The exposure method of  claim 20 , wherein said devices are storage capacitors of said liquid crystal display.  
   
   
       23 . The exposure method of  claim 20 , wherein said devices are storage electrodes of said liquid crystal display.  
   
   
       24 . The exposure method of  claim 20 , wherein said devices are combined electrodes of said liquid crystal display.  
   
   
       25 . A exposure method for forming a pixel structure of a liquid crystal display, said exposure method comprising: 
 determining devices related to a shot mura defect in a pixel region;    separating said pixel region into a plurality of sub-regions; and    performing photolithography processes respectively on said sub-regions to form said devices.    
   
   
       26 . The exposure method of  claim 25 , wherein said devices are switching transistors of said liquid crystal display.  
   
   
       27 . The exposure method of  claim 25 , wherein said devices are storage capacitors of said liquid crystal display.  
   
   
       28 . The exposure method of  claim 25 , wherein said devices are storage electrodes of said liquid crystal display.  
   
   
       29 . The exposure method of  claim 25 , wherein said devices are combined electrodes of said liquid crystal display.

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