US2005145988A1PendingUtilityA1
Semiconductor device and method of fabricating the same
Est. expirySep 12, 2021(expired)· nominal 20-yr term from priority
Inventors:Kazutaka Akiyama
H10W 20/496H10W 20/092H10W 20/081H10D 84/212H10D 1/692H10D 89/00
44
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Claims
Abstract
A semiconductor device includes a semiconductor substrate, an insulative film formed above the semiconductor substrate, the film having a first groove and a second groove greater in width than the first groove, a wiring lead buried in the first groove of the insulative film to have a substantially flat surface, and a capacitor buried in the second groove of the insulative film to have a substantially flat surface, the capacitor having a multilayer structure including a first conductive film identical in material to the lead, a capacitor dielectric film, and a second conductive film.
Claims
exact text as granted — not AI-modified1 - 11 . (canceled)
12 . A method of fabricating a semiconductor device, said method comprising:
forming a first groove in a wiring region of an insulative film overlying a semiconductor substrate while forming in a capacitor region a second groove greater in width than the first groove; depositing a first conductive film above said insulative film with said first groove and said second groove formed therein in such a way that said first conductive film is buried in the first and second grooves to fully fill said first groove while partially filling said second groove to a level between a bottom and a top of said second groove; depositing a capacitor dielectric film above said first conductive film so that said capacitor dielectric film is buried in said second groove to partially fill said second groove; depositing a second conductive film above said capacitor dielectric film so that said second conductive film is buried in said second groove to fully fill said second groove; and polishing said second conductive film, said capacitor dielectric film and said first conductive film until exposure of said insulative film to thereby form a wiring lead with said first conductive film buried in said first groove while forming a capacitor with said first conductive film, said capacitor dielectric film and said second conductive film buried in said second groove.
13 . The method according to claim 12 , wherein said second groove is formed to be deeper than said first groove, and wherein said first conductive film is buried in said first groove by deposition to a thickness equal to or greater than a depth of said first groove.
14 . The method according to claim 12 , wherein said first and second grooves are formed to substantially the same depth, and wherein said first conductive film is buried in said first groove by deposition to a thickness equal to or greater than half of a width of said first groove.
15 . The method according to claim 12 , wherein said first conductive film is a metal-plated Cu film.
16 . The method according to claim 12 , further comprising:
depositing an interlayer dielectric film covering said wiring lead and said capacitor; forming, in said interlayer dielectric film, contact openings for connection to said lead and said capacitor and an upper-level wiring lead groove coupled thereto; and burying a third conductive film in said contact openings and said upper-level wiring lead groove.
17 . The method according to claim 12 , further comprising:
forming above said insulative film another insulative film covering said capacitor and said lead; and forming in said another insulative film a first hole leading to said second conductive film of said capacitor and a second hole being coupled to said lead and being substantially the same in depth as said first hole.
18 . A method of fabricating a semiconductor device comprising:
forming in an insulative film above a semiconductor substrate a groove having a wiring lead portion and a contact portion as continued thereto, said contact portion being greater in width than said wire lead portion; depositing above said insulative film with said groove formed therein a first conductive film in such a way that said first conductive film is buried in said groove to fully fill said wiring lead portion while partially filling said contact portion; depositing above said first conductive film a second conductive film so that said second conductive film is buried to fully fill said contact portion; and polishing said second conductive film and said first conductive film to thereby form a wiring lead with said first conductive film buried in said wiring lead portion and with a multilayer of the first and second conductive films buried in said contact portion.
19 . The method according to claim 18 , wherein said first conductive film is a metal-plated Cu film and said second conductive film is a chemically vapor deposited film made of a material selected from the group consisting of Ti, TiN, Ta, TaN, W and WN.
20 . The method according to claim 18 , further comprising:
depositing an interlayer dielectric film covering said wiring lead; forming in said interlayer dielectric film a contact opening for connection to said contact portion and an upper-level wiring lead groove coupled thereto; and burying a third conductive film in said contact opening and said upper-level wiring lead groove.Join the waitlist — get patent alerts
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