Light-emitting diode
Abstract
A light-emitting diode device is provided with the following manufacturing method: forming an n-GaN layer on a substrate; growing an SiO 2 layer on the n-GaN surface, and using the photo-lithography process to expose the n-GaN within the mesa area; using MOCVD to grow an LED structure in the epitaxy within the mesa area, the formed structure being a p-n coplanar structure due to the selective area characteristic; and finally, forming the electrodes on the structure to complete an LED device. The device can be manufactured without the etching process to form the p-n coplanar structure. In comparison to other conventional manufacturing methods, the method simplifies the manufacturing process, and avoids many problems associated with etching, including non-uniform etching, overly rough surface, etching damages, and current leakage. Furthermore, SiO 2 is used as a scattering layer to prevent emitted light from internally reflected, and therefore, improves the external quantum efficiency.
Claims
exact text as granted — not AI-modified1 . A light-emitting diode (LED) device, comprising:
a substrate; a first semiconductor layer, formed on top of the substrate; an insulating layer, formed on top of the first semiconductor layer; a mesa area, formed on the insulting layer and exposing the surface of the first semiconductor layer; and an LED structure formed on the exposed surface of the first semiconductor layer; where the LED structure being a light-emitting active layer and a p-type GaN III-V group compound layer, the p-type GaN III-V group compound layer being connected to a p-type low-resistance ohm contact, and an n-type GaN III-V group compound layer being connected to an n-type low-resistance ohm contact to provide a forward bias.
2 . The LED device as claimed in claim 1 , wherein the substrate is selected from the group consisting of sapphire, SiC, Si, GaAs, LiAlO 2 , LiGaO 2 , AlN.
3 . The LED device as claimed in claim 1 , wherein the first semiconductor layer is an n-type semiconductor layer.
4 . The LED device as claimed in claim 1 , wherein the first semiconductor layer is an Al x Ga (1-x-y) In y N thick film, with 0≦x,y<1, 0≦x+y<1.
5 . The LED device as claimed in claim 1 , wherein the insulating layer at least comprises a material selected from a group consisting of SiO 2 , SiN, AlN, TiN, Al 2 O 3 and a combination thereof.
6 . The LED device as claimed in claim 1 , wherein the insulating layer is made of metal, alloy, or their combination.
7 . The LED device as claimed in claim 1 , wherein the insulating layer is fabricated with an e-gun, sputter, or CVD method.
8 . The LED device as claimed in claim 1 , wherein the insulating layer has the thickness greater than 0.1 μm.
9 . The LED device as claimed in claim 1 , wherein the mesa area is formed with a photo-lithography process.
10 . The LED device as claimed in claim 1 , wherein the light-emitting active layer is a P-N junction, DH, SQW, or MQW structure.
11 . A light-emitting diode (LED) device, comprising:
a substrate; a first semiconductor layer, formed on top of the substrate; a plurality of trenches, formed in a part of area of the first semiconductor layer; an insulating layer, formed in the trenches; and an LED structure formed on the exposed surface of the first semiconductor layer; where the LED structure being a light-emitting active layer and a p-type GaN III-V group compound layer, the p-type GaN III-V group compound layer being connected to a p-type low-resistance ohm contact, and an n-type GaN III-v group compound layer being connected to an n-type low-resistance ohm contact to provide a forward bias.
12 . The LED device as claimed in claim 11 , wherein the substrate is selected from a group consisting of sapphire, SiC, Si, GaAs, LiAlO 2 , LiGaO 2 , AlN.
13 . The LED device as claimed in claim 11 , wherein the first semiconductor layer is an Al x Ga (1-x-y) In y N thick film, with 0≦x,y≦1, 0≦x+y<1.
14 . The LED device as claimed in claim 11 , wherein the first semiconductor layer has the thickness greater than 0.1 μm.
15 . The LED device as claimed in claim 11 , wherein the method of forming the trenches on the first semiconductor layer comprises at least one of the following methods: photo-lithography or laser processing.
16 . The LED device as claimed in claim 11 , wherein the method of forming the trenches on the first semiconductor layer comprises at least one of the following methods: wet etching or dry etching.
17 . The LED device as claimed in claim 11 , wherein the depth of the trenches on the first semiconductor layer is less than or equal to the thickness of the first semiconductor layer.
18 . The LED device as claimed in claim 11 , wherein the depth of the trenches on the first semiconductor layer is greater than the thickness of the first semiconductor layer.
19 . The LED device as claimed in claim 11 , wherein the shape of the trenches on the first semiconductor layer comprises at least one of the following or their combination: rectangle, triangle, circle, and polygon.
20 . The LED device as claimed in claim 11 , wherein the insulating layer is selected from a group consisting of SiO 2 , Si 3 N 4 , AlN, TiN, TiO 2 and a combination thereof.
21 . The LED device as claimed in claim 11 , wherein the insulating layer is made of metal, alloy, or their combination.
22 . The LED device as claimed in claim 11 , wherein the insulating layer has the thickness greater than 0.1 μm.
23 . The LED device as claimed in claim 11 , wherein the light-emitting active layer is a P-N junction, DH, SQW, or MQW structure.Join the waitlist — get patent alerts
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