LDO regulator with sleep mode

Abstract

A mobile communications device ( 50 ) includes a plurality of LDOs ( 30 ) for supplying a stable voltage to various circuits on the device. In a normal mode, the LDO's main bandgap voltage source ( 12 ) supplies a voltage to a main amplifier ( 16 ). During deep sleep mode, sleep logic ( 40 ) places the LDOs in a sleeping state, where a low current sleep bandgap voltage source ( 32 ) supplies a voltage to a smaller, sleep amplifier ( 36 ), which maintains a charge on capacitors ( 24, 26 ) for a fast transitions to a full ON state.

1 - 7 . (canceled)  
   
   
       8 . A regulator comprising: 
 a first voltage reference;    a second voltage reference with a significantly lower current consumption than said first voltage reference;    a bias current supply;    a first amplifier;    a second amplifier which consumes less bias current than said first amplifier; and    sleep logic for: 
 coupling said first voltage reference to said first amplifier and said bias current supply to said first amplifier in a normal mode; and  
 coupling said second voltage reference to said second amplifier and said bias current supply to said second amplifier in a sleep mode.  
   
   
   
       9 . The regulator of  claim 8  wherein said sleep logic decouples said first voltage reference from said first amplifier in said sleep mode.  
   
   
       10 . The regulator of  claim 8  wherein said sleep logic decouples said bias current source from said first amplifier in said sleep mode.  
   
   
       11 . The regulator of  claim 8  wherein said first and second voltage references are bandgap voltage references.  
   
   
       12 . The regulator of  claim 8  wherein said regulator further includes an output voltage capacitor charged by said first amplifier in normal mode and by said second amplifier in sleep mode.  
   
   
       13 . The regulator of  claim 8  wherein said regulator further includes an filtering capacitor charged by said first voltage reference in normal mode and by said second voltage reference in sleep mode.  
   
   
       14 . A method of generating an output voltage in a regulator, comprising the steps of: 
 receiving a control signal indicating a normal mode or a sleep mode;    in normal mode, coupling a first voltage from a first voltage reference to a first amplifier and coupling a bias current to a first amplifier in a normal mode; and    in sleep mode, coupling a second voltage from a second voltage reference with a significantly lower current consumption than said first voltage reference to a second amplifier which consumes less bias current than said first amplifier and said bias current supply to said second amplifier in a sleep mode.    
   
   
       15 . The method of  claim 14  and further comprising the step of decoupling said first voltage reference from said first amplifier in sleep mode.  
   
   
       16 . The method of  claim 14  and further comprising the step of decoupling said bias current source from said first amplifier in sleep mode.  
   
   
       17 . The method of  claim 14  wherein said first and second voltage references are bandgap voltage references.  
   
   
       18 . The method of  claim 14  and further comprising the step of charging an output voltage capacitor with said first amplifier in normal mode and by said second amplifier in sleep mode.  
   
   
       19 . The method of  claim 14  and further comprising the step of charging a filtering capacitor by said first voltage reference in normal mode and by said second voltage reference in sleep mode.