US2005132141A1PendingUtilityA1
Cache system
Assignee: STMICROELECTRONICS LTD FORMERLPriority: Jan 30, 1997Filed: Jan 28, 2005Published: Jun 16, 2005
Est. expiryJan 30, 2017(expired)· nominal 20-yr term from priority
G06F 12/1045G06F 12/0864G06F 12/0842G06F 12/0848G06F 12/0804
47
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Claims
Abstract
A cache system is provided which includes a cache memory and a cache refill mechanism which allocates one or more of a set of cache partitions in the cache memory to an item in dependence on the address of the item in main memory. This is achieved in one of the described embodiments by including with the address of an item a set of partition selector bits which allow a partition mask to be generated to identify into which cache partition the item may be loaded.
Claims
exact text as granted — not AI-modified1 . A cache system for operating between a processor and a main memory of a computer, the cache system comprising:
a cache memory having a set of cache partitions, each cache partition comprising a plurality of addressable storage locations for holding items fetched from said main memory for use by the processor; a cache refill mechanism arranged to fetch an item from the main memory and to load said item into the cache memory at one of said addressable storage locations; and a cache partition mask generator which generates from a partition selector associated with the address of an item to be cached a multi-bit partition mask identifying into which cache partition the time may be loaded so that the cache refill mechanism is operable to allocate to each said item fetched from the main memory one of said cache partitions in dependence on the address of said item in the main memory.
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