US2005129372A1PendingUtilityA1
Method and apparatus for manufacturing a transistor-outline (TO) can having a ceramic header
Priority: Dec 11, 2003Filed: Dec 11, 2003Published: Jun 16, 2005
Est. expiryDec 11, 2023(expired)· nominal 20-yr term from priority
Inventors:Tieyu Zheng
G06F 11/3051G02B 6/4201
46
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Claims
Abstract
A method of manufacturing a hermetically-sealed optoelectronic package having an insulating base, a metal cap, and a metal layer sandwiched between the metal cap and the insulating base includes supplying a force to push the metal cap against the metal layer and to push the metal layer against the insulating base. A first electrode is applied to the metal cap, and a second electrode is applied to the metal layer. A current is supplied between the first and second electrodes to weld the metal cap to the metal layer.
Claims
exact text as granted — not AI-modified1 . A method of manufacturing a hermetically-sealed optoelectronic package having an optoelectronic device mounted on a first portion of a top surface of an insulating base, a metal layer mounted to a second portion of the top surface of the insulating base, the second portion surrounding the first portion, and a metal cap coupled to the metal layer, the method comprising:
supplying a force to push the metal cap against the metal layer; applying a first electrode to the metal cap; applying a second electrode to the metal layer; and supplying a current between the first and second electrodes to weld the metal cap to the metal layer.
2 . The method of claim 1 , wherein the second electrode has multiple fingers to make contact with the metal layer at multiple points.
3 . The method of claim 2 , wherein the multiple fingers of the second electrode are independently positioned on the metal layer.
4 . The method of claim 2 , further comprising:
independently adjusting one or more currents provided to the multiple fingers of the second electrode.
5 . The method of claim 1 , wherein the metal cap is coupled to an upper surface of the metal layer and the second electrode is also coupled to the upper surface of the metal layer.
6 . The method of claim 1 , wherein the metal cap is coupled to an upper surface of the metal layer and the second electrode is coupled to a side surface of the metal layer, the side surface being substantially 90 degrees from the upper surface.
7 . The method of claim 1 , wherein the metal cap is coupled to an upper surface of the metal layer and the second electrode is coupled to a bottom surface of the metal layer, the bottom surface being substantially 180 degrees from the top surface.
8 . The method of claim 1 , wherein the second electrode is cone-shaped.
9 . A method for manufacturing an electronic package, comprising:
applying a first electrode to a cap; applying at least one or more second electrodes to a ceramic substrate, wherein the at least one or more second electrodes are applied to at least one or more sidewalls of the ceramic substrate and wherein the ceramic substrate includes a seal disposed on a surface of the ceramic substrate to contact the cap; contacting the cap with the seal of the ceramic substrate; and applying a current between said first electrode and said at least one or more second electrodes to weld the cap to the ceramic substrate.
10 . A method as claimed in claim 9 , wherein the ceramic substrate is a rectangular structure having at least four sidewalls.
11 . A method as claimed in claim 9 , wherein the ceramic substrate has a least one sidewall.
12 . A method as claimed in claim 9 , wherein the substrate has at least one curved sidewall.
13 . A method as claimed in claim 9 , wherein the ceramic substrate includes a radio-frequency circuit disposed thereon.
14 . A method as claimed in claim 9 , further comprising controlling the current in individual ones of the at least one or more second electrodes to provide a hermetic seal between the cap and the ceramic substrate.
15 . A method as claimed in claim 9 , wherein the at least one or more second electrodes include an insulator to contact a base support during said applying a current.
16 . A method as claimed in claim 9 , wherein the ceramic substrate does not include filled vias to pass welding current.
17 . A method as claimed in claim 9 , wherein the ceramic substrate is a rectangular structure having four sidewalls, the at least one or more second electrodes including four second electrodes to be applied to respective sidewalls of the ceramic substrate.
18 . A method for manufacturing an electronic package, comprising:
applying a first electrode to a cap; applying at least one or more second electrodes to an insulator substrate, wherein the at least one or more second electrodes are applied to at least one or more sidewalls of the insulator substrate and wherein the insulator substrate includes a seal disposed on a surface of the isolator substrate to contact the cap; contacting the cap with the seal of insulator substrate; and applying a current between said first electrode and said at least one or more second electrodes to weld the cap to the insulator substrate.
19 . A method as claimed in claim 18 , wherein the insulator substrate has a conductivity of less than 1 (ohm-centimeters) −1 .
20 . A method as claimed in claim 18 , wherein the insulator substrate is a rectangular structure having four sidewalls, the at least one or more second electrodes including four second electrodes to be applied to respective sidewalls of the insulator substrate.Join the waitlist — get patent alerts
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