Squaring cells and multipliers using summed exponentials

Abstract

A squaring cell combines first and second exponential currents to approximate square law behavior. The exponential currents can be generated by current stacks having pairs of series-connected junctions. The exponential currents can be altered to change the shape of the exponential currents to better approximation true square law behavior. A multiplier combines four exponential currents to approximate a multiplication function. The exponential currents in the multiplier can be generated by current stacks that are cross-connected so as to generate two output currents, the difference of which represents the multiplication of two input signals.

1 . A current mirror comprising: 
 a first transistor having a first terminal to receive an input current;    a second transistor having a first terminal to provide an output current; and    an operational amplifier arranged to maintain the first terminals of the first and second transistors at the same potential.    
   
   
       2 . A current mirror according to  claim 1  where: 
 the first transistor has a second terminal coupled to a power supply terminal, and a third terminal; and    the second transistor has a second terminal coupled to the power supply terminal, and a third terminal coupled to the third terminal of the first transistor.    
   
   
       3 . A current mirror according to  claim 2  where the third terminals of the first and second transistors are coupled to an output terminal of the operational amplifier.  
   
   
       4 . A current mirror according to  claim 1  where the first terminals of the first and second transistors are coupled to input terminals of the operational amplifier.  
   
   
       5 . A current mirror according to  claim 1  where the operational amplifier comprises a differential pair of transistors having input terminals coupled to the first terminals of the first and second transistors.  
   
   
       6 . A current mirror according to  claim 5  where the operational amplifier further comprises a current mirror arranged to load the differential pair of transistors.  
   
   
       7 . A current mirror according to  claim 1  where: 
 the first transistor comprises a BJT having a collector as the first terminal, an emitter coupled to a power supply terminal, and a base; and    the second transistor comprises a BJT having a collector as the first terminal, an emitter coupled to the power supply terminal, and a base coupled to the base of the first transistor and an output terminal of the operational amplifier.    
   
   
       8 . A current mirror according to  claim 7  where the operational amplifier comprises a differential pair of transistors having a first input terminal coupled to the collector of the first transistor and a second input terminal coupled to the collector of the second transistor.  
   
   
       9 . A current mirror according to  claim 8  where the operational amplifier further comprises a current mirror arranged to load the differential pair of transistors.  
   
   
       10 . A method comprising: 
 receiving an input current at a first terminal of a first transistor;    mirroring the input current at a first terminal of a second transistor; and    driving a second terminal of the first transistor and a second terminal of the second transistor responsive to the first terminals of the first and second transistors.    
   
   
       11 . A method according to  claim 10  where driving the second terminals comprises maintaining the first terminals of the first and second transistors at the same potential.  
   
   
       12 . A method according to  claim 11  where maintaining the first terminals comprises amplifying the difference in potential between the first terminals.  
   
   
       13 . A method according to  claim 12  where amplifying comprises applying the difference in potential between the first terminals to a differential pair of transistors.  
   
   
       14 . A method according to  claim 13  where amplifying further comprises loading the differential pair with a current mirror.  
   
   
       15 . A current mirror comprising: 
 means for receiving an input current at an input terminal;    means for mirroring the input current to an output terminal; and    means for maintaining the input and output terminals at the same potential.    
   
   
       16 . A current mirror according to  claim 15  where the means for maintaining comprises an operational amplifier.  
   
   
       17 . A current mirror according to  claim 15  where: 
 the means for receiving the input current comprises a first transistor having a first terminal as the input terminal, a second terminal coupled to a power supply terminal, and a third terminal; and    the means for mirroring the input current comprises a second transistor having a first terminal as the output terminal, a second terminal coupled to the power supply terminal, and a third terminal coupled to the third terminal of the first transistor.    
   
   
       18 . A current mirror according to  claim 17  where the means for maintaining comprises an operational amplifier.  
   
   
       19 . A current mirror according to  claim 17  where the means for maintaining comprises means for converting the difference in potential between the input and output terminals to a differential current.  
   
   
       20 . A current mirror according to  claim 19  where the means for maintaining further comprises means for loading the means for converting.