Digital control logic circuit having a characteristic of time hysteresis

Abstract

The present invention discloses a digital control logic circuit having a characteristic of time hysteresis for controlling transition of a digital control signal for a predetermined period, comprising a first time hysteresis unit, a second time hysteresis unit and an inverter. The first time has the characteristic of time hysteresis when an input signal transits from a first level to a second level. The second time hysteresis unit has the characteristic of time hysteresis connected to the first hysteresis in series when the input signal transits from the second level to the first level.

1 - 5 . (canceled)  
   
   
       6 . A digital control logic circuit having a characteristic of time hysteresis, comprising: 
 a delay unit for delaying an input signal; and    a state machine for receiving the input signal and an output signal from the delay unit, having an output value determined under control of the transition state, and adjusting its state according to the output value to have a characteristic of time hysteresis for both cases when the input signal transits from low level to high level and when the input signal transits from high level to low level.    
   
   
       7 . The circuit according to  claim 6 , wherein the state machine is a 2 bit state machine.  
   
   
       8 . (canceled)