Semiconductor device and a method of manufacturing the same
Abstract
A semiconductor device comprising a plurality of wires for electrically connecting a plurality of electrode pads arranged on a main surface of a semiconductor chip along one side of the semiconductor chip to a plurality of connecting portions arranged on the main surface of a wiring substrate along one side of the semiconductor chip, respectively, wherein second wires out of the plural wires consisting of first and second wires adjacent to each other have a larger loop height than the first wires, one end portions of the second wires are connected to the electrode pads at positions farther from one side of the semiconductor chip than the one end portions of the first wires, and the other end portions of the second wires are connected to the connecting portions at positions farther from one side of the semiconductor chip than the other end portions of the first wires.
Claims
exact text as granted — not AI-modified1 - 29 . (canceled)
30 . A method of manufacturing semiconductor devices, comprising:
providing a wafer having chip forming areas, each chip forming area having a plurality of rectangular bonding pads arranged along its periphery and each rectangular bonding pad having longitudinally opposite first and second connection ends; testing a circuit formed in each of said chip forming areas by a probing procedure in which a test probe contacts a substantially central position of each rectangular bonding pad; dicing said wafer along said chip forming areas to form a plurality of semiconductor chips each having a plurality of said bonding pads and each having a circuit that has been tested by said probing procedure; mounting said plurality of semiconductor chips on device forming areas of a wiring substrate, each device forming area having a plurality of electrodes in a zig-zag formation; and electrically connecting said plurality of bonding pads of each of said semiconductor chips with designated electrodes of said plurality of electrodes by bonding wires, the connections to the rectangular bonding pads of each pair of adjacent bonding pads being made to a first connection end of one bonding pad of the pair and to a second connection end of the other bonding pad of the pair.
31 . A method according to claim 30 , wherein the rectangular bonding pads of each chip forming area include a set of bonding pads arranged along one side of that chip forming area, and the first end of each bonding pad of the set is closer to the one side of the chip forming area than the second end.
32 . A method according to claim 31 , wherein electrodes of the plurality are arranged along said one side of the chip forming area in first and second rows, the first row being closer to said one side of the chip forming area than the second row.
33 . A method according to claim 32 , wherein the connecting of the rectangular bonding pads and the electrodes uses a plurality of wires, wires connecting the first row of the electrodes to the bonding pads being shorter than wires connecting the second row of electrodes to the bonding pads.
34 . A method according to claim 30 , wherein two long opposite sides of each rectangular bonding pad extend in a direction away from an adjacent side of a chip forming area.
35 . A method according to claim 34 , wherein the long sides of each of the bonding pads are longer than the first connection end length and the second connection end length combined.
36 . A method according to claim 30 , wherein the bonding pads are arranged with a pitch that is narrower than a pitch of the electrodes.
37 . A method according to claim 30 , wherein a probe needle contact mark is formed on a surface of each bonding pad between the first and second connection ends of the bonding pad.Join the waitlist — get patent alerts
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