US2005116237A1PendingUtilityA1

Method for forming a flexible metal foil substrate display

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Assignee: SHARP LAB OF AMERICA INCPriority: Jul 11, 2002Filed: Jan 5, 2005Published: Jun 2, 2005
Est. expiryJul 11, 2022(expired)· nominal 20-yr term from priority
Inventors:Apostolos T. Voutsas
H10D 86/40H10D 86/411H10D 86/60H10D 30/6758H10D 30/6739H10D 30/0321H10D 30/0314H10D 86/0212H10K 59/1213H10K 2102/311H10K 2102/3026H10K 77/111H10K 59/12G11C 13/0007Y02P70/50Y02E10/549G11C 2213/31
49
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Claims

Abstract

A flexible metal foil substrate organic light emitting diode (OLED) display and a method for forming the same are provided. The method comprises: supplying a metal foil substrate such as titanium (Ti), Inconel alloy, or Kovar, having a thickness in the range of 10 to 500 microns; planarizing the metal foil substrate surface; depositing an electrical isolation layer having a thickness in the range of 0.5 to 2 microns overlying the planarized metal foil substrate surface; depositing amorphous silicon having a thickness in the range of 25 to 150 nanometers (nm) overlying the electrical insulation layer; from the amorphous silicon, forming polycrystalline silicon overlying the electrical insulation layer; forming thin-film transistors (TFTs) in the polycrystalline silicon; and, forming an electronic circuit using the TFTs, such as an OLED display.

Claims

exact text as granted — not AI-modified
1 . A method for forming an electronics circuit on a flexible substrate, the method comprising: 
 supplying a metal foil substrate with a surface selected from the group including titanium (Ti), Inconel alloy, and Kovar;    forming polycrystalline silicon overlying the electrical insulation layer;    forming thin-film transistors (TFTs) in the polycrystalline silicon; and,    forming an electronic circuit using the TFTs.    
     
     
         2 . The method of  claim 1  further comprising: 
 planarizing the metal foil substrate surface;    depositing an electrical isolation layer overlying the planarized metal foil substrate surface;    depositing amorphous silicon overlying the electrical insulation layer; and,    wherein forming polycrystalline silicon overlying the electrical insulation layer includes forming polycrystalline silicon from the amorphous silicon.    
     
     
         3 . The method of  claim 1  wherein supplying a metal foil substrate with a surface includes supplying a metal foil having a thickness in the range of 10 to 500 microns.  
     
     
         4 . The method of  claim 3  wherein supplying a metal foil substrate with a surface includes supplying a metal foil having a thickness in the range of 50 to 250 microns.  
     
     
         5 . The method of  claim 4  wherein supplying a metal foil substrate with a surface includes supplying a metal foil having a thickness in the range of 100 to 200 microns.  
     
     
         6 . The method of  claim 2  wherein depositing an electrical isolation layer overlying the planarized metal foil substrate surface includes depositing a layer having a thickness in the range of 0.5 to 2 microns.  
     
     
         7 . The method of  claim 6  wherein depositing an electrical isolation layer overlying the planarized metal foil substrate surface includes depositing a layer having a thickness in the range of 0.5 to 1.5 microns.  
     
     
         8 . The method of  claim 7  wherein depositing an electrical isolation layer overlying the planarized metal foil substrate surface includes depositing a layer having a thickness in the range of 0.5 to 1 microns.  
     
     
         9 . The method of  claim 2  wherein depositing amorphous silicon includes depositing amorphous silicon having a thickness in the range of 25 to 150 nanometers (nm).  
     
     
         10 . The method of  claim 9  wherein depositing amorphous silicon includes depositing amorphous silicon having a thickness in the range of 25 to 100 nm.  
     
     
         11 . The method of  claim 10  wherein depositing amorphous silicon includes depositing amorphous silicon having a thickness in the range of 35 to 60 nm.  
     
     
         12 . The method of  claim 1  wherein forming an electronics circuit includes forming a organic light emitting diode (OLED) display.  
     
     
         13 . A method for forming an organic light emitting diode (OLED) display on a flexible substrate, the method comprising: 
 supplying a metal foil substrate with a surface selected from the group including titanium (Ti), Inconel alloy, and Kovar;    forming polycrystalline silicon overlying the electrical insulation layer;    forming thin-film transistors (TFTs) in the polycrystalline silicon; and,    forming OLEDs overlying the TFTs.    
     
     
         14 . The method of  claim 13  further comprising: 
 planarizing the metal foil substrate surface;    depositing an electrical isolation layer overlying the planarized metal foil substrate surface;    depositing amorphous silicon overlying the electrical insulation layer; and,    wherein forming polycrystalline silicon overlying the electrical insulation layer includes forming polycrystalline silicon from the amorphous silicon.    
     
     
         15 . The method of  claim 13  wherein supplying a metal foil substrate with a surface includes supplying a metal foil having a thickness in the range of 10 to 500 microns.  
     
     
         16 . The method of  claim 15  wherein supplying a metal foil substrate with a surface includes supplying a metal foil having a thickness in the range of 50 to 250 microns.  
     
     
         17 . The method of  claim 16  wherein supplying a metal foil substrate with a surface includes supplying a metal foil having a thickness in the range of 100 to 200 microns.  
     
     
         18 . The method of  claim 14  wherein depositing an electrical isolation layer overlying the planarized metal foil substrate surface includes depositing a layer having a thickness in the range of 0.5 to 2 microns.  
     
     
         19 . The method of  claim 18  wherein depositing an electrical isolation layer overlying the planarized metal foil substrate surface includes depositing a layer having a thickness in the range of 0.5 to 1.5 microns.  
     
     
         20 . The method of  claim 19  wherein depositing an electrical isolation layer overlying the planarized metal foil substrate surface includes depositing a layer having a thickness in the range of 0.5 to 1 microns.  
     
     
         21 . The method of  claim 14  wherein depositing amorphous silicon includes depositing amorphous silicon having a thickness in the range of 25 to 150 nanometers (nm).  
     
     
         22 . The method of  claim 21  wherein depositing amorphous silicon includes depositing amorphous silicon having a thickness in the range of 25 to 100 nm.  
     
     
         23 . The method of  claim 22  wherein depositing amorphous silicon includes depositing amorphous silicon having a thickness in the range of 35 to 60 nm.  
     
     
         24 . The method of  claim 13  wherein forming OLEDs overlying the TFTs includes: 
 forming a metal anode overlying the TFTs;    forming a polymer organic layer overlying the anode; and,    forming a semi-transparent cathode overlying the organic layer.    
     
     
         25 . The method of  claim 13  further comprising: 
 forming a resin layer overlying the OLEDs; and,    forming a seal plate overlying the resin layer.    
     
     
         26 . The method of  claim 13  wherein forming OLEDs overlying the TFTs includes: 
 forming a metal cathode overlying the TFTs;    forming a polymer organic layer overlying the cathode; and,    forming a semi-transparent anode overlying the organic layer.    
     
     
         27 - 43 . canceled

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