User initiated microcode modification

Abstract

An instruction decoding unit in a microcomputer is disclosed having an instruction word capable of being selected by a user to conveniently produce application software while maintaining security. The decoding unit in a microcomputer includes an instruction register for storing instructions fetched from a memory, an instruction decoder for decoding instruction codes of the instructions stored in the instruction register and for designating micro-instructions to be executed, a micro-ROM for outputting a series of the micro-instructions designated by the instruction decoder, and a user instruction selector for selecting or changing the micro-instructions of the micro-ROM in response to user's selection so as to change the operation of an instruction word.

1 . An instruction decoding unit in a microcomputer comprising: 
 an instruction register storing instructions fetched from a memory;    an instruction decoder decoding instruction codes of the instructions stored in the instruction register and for designating micro-instructions to be executed based on the decoded instruction codes;    a micro-ROM outputting the micro-instructions designated by the instruction decoder; and    a user instruction selector selecting or changing the micro-instructions from the micro-ROM in response to a selection by a user so as to change an operation of an instruction word corresponding to the instruction being fetched without any subsequent intervening storage of the micro-instructions in RAM.    
   
   
       2 . The instruction decoding unit in a microcomputer as claimed in  claim 1 , wherein the user instruction selector selects the micro-instructions using a mask option or a particular register.  
   
   
       3 . An apparatus to provide microcodes comprising: 
 a ROM storing a plurality of microcodes;    an instruction processor receiving instructions from a user and instructing the ROM to output a first microcode; and    a selector allowing the user to selectively modify the microcodes stored in the ROM, to output a second microcode without any subsequent intervening storage of the microcodes in RAM,    the first and second microcodes being combined to form a control signal.    
   
   
       4 . The apparatus of  claim 3 , wherein the selector outputs the second microcode by increasing, decreasing or inverting the microcodes stored in the ROM.  
   
   
       5 . The apparatus of  claim 3 , wherein the selector comprises a switch operated by map selecting bits determined according to a number of instruction maps.  
   
   
       6 . The apparatus of  claim 3 , wherein the instruction processor further comprises: 
 an instruction register storing instructions fetched from a memory; and    an instruction decoder decoding instruction codes of the instructions stored in the instruction register and designating micro-instructions to be executed based on the decoded instruction codes.    
   
   
       7 . The apparatus of  claim 6 , wherein the instruction processor further comprises an instruction code selector, connected between the instruction register and the instruction decoder, allowing a user to select a signal pertaining to a plurality of instruction maps.  
   
   
       8 . The apparatus of  claim 7 , wherein the instruction code selector rearranges a plurality of bits received from the instruction register based on the instruction maps, and applies a plurality of map selecting bits to the rearranged bits to allow subsequent reconstruction by the instruction decoder.