US2005104210A1PendingUtilityA1

Use of palladium in IC manufacturing with conductive polymer bump

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Priority: May 21, 1996Filed: Dec 9, 2004Published: May 19, 2005
Est. expiryMay 21, 2016(expired)· nominal 20-yr term from priority
Inventors:Warren M. FarnworthSalman Akram
H05K 3/244H05K 2201/10674H05K 2201/10977H05K 2201/10984H05K 3/321H10W 72/856H10W 72/9415H10W 72/923H10W 72/07331H10W 72/07236H10W 72/073H10W 72/354H10W 72/351H10W 72/325H10W 72/352H10W 90/724H10W 72/07251H10W 72/253H10W 72/251H10W 72/252H10W 72/012H10W 72/20H10W 72/01223H10W 72/019H10W 90/701H10W 70/69H10W 74/15H10P 14/46H10W 74/012H10W 70/093
46
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Claims

Abstract

An apparatus and a method for forming a substrate having a palladium metal layer over at least one contact point of the substrate and having a flexible conductive polymer bump, preferably a two-stage epoxy, on the palladium plated contact point. The present invention also relates to assemblies comprising one or more of these substrates.

Claims

exact text as granted — not AI-modified
1 . A method for forming a semiconductor assembly having a plurality of substrates, each substrate having at least one conductive electrode, comprising: 
 applying a layer of palladium on a portion of the at least one conductive electrode of one substrate of the plurality of substrates; and    disposing a two-stage conductive polymer bump between a portion of the at least one conductive electrode having the layer of palladium thereon of the one substrate of the plurality of substrates and a portion of the at least one conductive electrode of another substrate of the plurality of substrates for forming an electrical contact therebetween.    
     
     
         2 . The method of  claim 1 , wherein disposing a two-stage conductive polymer bump comprises disposing a two-stage conductive polymer bump including palladium therein on a portion of the layer of palladium.  
     
     
         3 . The method of  claim 1 , further comprising: 
 applying a passivation layer over a portion of a surface of the one substrate of the plurality of substrates having the at least one conductive electrode.    
     
     
         4 . The method of  claim 3 , further comprising: 
 etching a portion of the passivation layer to expose a portion of the at least one conductive electrode.    
     
     
         5 . The method of  claim 1 , wherein disposing a two-stage conductive polymer bump comprises disposing a two-stage epoxy bump on a portion of layer of palladium.  
     
     
         6 . The method of  claim 1 , wherein applying the layer of palladium on a portion of the at least one conductive electrode of the one substrate comprises: 
 immersing the one substrate of the plurality of substrates in an electroless plating solution containing palladium dispersed therein.    
     
     
         7 . The method of  claim 1 , wherein disposing a two-stage conductive polymer bump comprises applying a layer of a polymer with a silk screen to form the two-stage conductive polymer bump.  
     
     
         8 . The method of  claim 1 , wherein disposing a two-stage conductive polymer bump comprises applying multiple layers of a polymer with a silk screen to form the two-stage conductive polymer bump.  
     
     
         9 . The method of  claim 1 , wherein the one substrate of the plurality of substrates comprises a silicon wafer.  
     
     
         10 . The method of  claim 1 , wherein the one substrate of the plurality of substrates comprises a printed circuit board.  
     
     
         11 . The method of  claim 1 , wherein the one substrate of the plurality of substrates comprises a semiconductor die having the at least one conductive electrode comprising at least one bond pad.  
     
     
         12 . A method for forming a bump on a substrate for a semiconductor assembly having a plurality of substrates, each substrate having at least one conductive electrode, comprising: 
 applying a layer of palladium on a portion of the at least one conductive electrode of one substrate of the plurality of substrates; and    disposing a two-stage conductive polymer bump between a portion of the at least one conductive electrode having the layer of palladium thereon of the one substrate of the plurality of substrates and a portion of the at least one conductive electrode of another substrate of the plurality of substrates for forming an electrical contact therebetween.    
     
     
         13 . The method of  claim 12 , wherein disposing a two-stage conductive polymer bump comprises disposing a two-stage conductive polymer bump including palladium therein on a portion of the layer of palladium.  
     
     
         14 . The method of  claim 12 , further comprising: 
 applying a passivation layer over a portion of a surface of the one substrate of the plurality of substrates having the at least one conductive electrode.    
     
     
         15 . The method of  claim 14 , further comprising: 
 etching a portion of the passivation layer to expose a portion of the at least one conductive electrode.    
     
     
         16 . The method of  claim 12 , wherein disposing a two-stage conductive polymer bump comprises disposing a two-stage epoxy bump on a portion of the layer of palladium.  
     
     
         17 . The method of  claim 12 , wherein applying the layer of palladium on a portion of the at least one conductive electrode of the one substrate comprises: 
 immersing the one substrate of the plurality of substrates in an electroless plating solution containing palladium dispersed therein.    
     
     
         18 . The method of  claim 12 , wherein disposing a two-stage conductive polymer bump comprises applying a layer of a polymer with a silk screen to form the two-stage conductive polymer bump.  
     
     
         19 . The method of  claim 12 , wherein disposing a two-stage conductive polymer bump comprises applying multiple layers of a polymer with a silk screen to form the two-stage conductive polymer bump.  
     
     
         20 . The method of  claim 12 , wherein the one substrate of the plurality of substrates comprises a silicon wafer.  
     
     
         21 . The method of  claim 12 , wherein the one substrate of the plurality of substrates comprises a printed circuit board.  
     
     
         22 . The method of  claim 12 , wherein the one substrate of the plurality of substrates comprises a semiconductor die having the at least one conductive electrode comprising at least one bond pad.  
     
     
         23 . A method for forming a bump on a bond pad of a semiconductor assembly having a plurality of substrates, each substrate having at least one conductive electrode having a bond pad, comprising: 
 applying a layer of palladium on a portion of the at least one conductive electrode of one substrate of the plurality of substrates; and    disposing a two-stage conductive polymer bump between a portion of the at least one conductive electrode having the layer of palladium thereon of the one substrate of the plurality of substrates and a portion of the at least one conductive electrode of another substrate of the plurality of substrates for forming an electrical contact therebetween.    
     
     
         24 . The method of  claim 23 , wherein disposing a two-stage conductive polymer bump comprises disposing a two-stage conductive polymer bump including palladium therein on a portion of the layer of palladium.  
     
     
         25 . The method of  claim 23 , further comprising: 
 applying a passivation layer over a portion of a surface of the one substrate of the plurality of substrates having the at least one conductive electrode.    
     
     
         26 . The method of  claim 25 , further comprising: 
 etching a portion of the passivation layer to expose a portion of the at least one conductive electrode.    
     
     
         27 . The method of  claim 23 , wherein disposing a two-stage conductive polymer bump comprises disposing a two-stage epoxy bump on a portion of the layer of palladium.  
     
     
         28 . The method of  claim 23 , wherein applying the layer of palladium on a portion of the at least one conductive electrode of the one substrate comprises: 
 immersing the one substrate of the plurality of substrates in an electroless plating solution containing palladium dispersed therein.    
     
     
         29 . The method of  claim 23 , wherein disposing a two-stage conductive polymer bump comprises applying a layer of a polymer with a silk screen to form the two-stage conductive polymer bump.  
     
     
         30 . The method of  claim 23 , wherein disposing a two-stage conductive polymer bump comprises applying multiple layers of a polymer with a silk screen to form the two-stage conductive polymer bump.  
     
     
         31 . The method of  claim 23 , wherein the one substrate of the plurality of substrates comprises a silicon wafer.  
     
     
         32 . The method of  claim 23 , wherein the one substrate of the plurality of substrates comprises a printed circuit board.  
     
     
         33 . The method of  claim 23 , wherein the one substrate of the plurality of substrates comprises a semiconductor die having the at least one conductive electrode comprising at least one bond pad.  
     
     
         34 . A method for forming a semiconductor assembly having a plurality of substrates, each substrate having at least one conductive electrode having a pad, comprising: 
 applying a layer of palladium on a portion of the pad of the at least one conductive electrode of one substrate of the plurality of substrates; and    disposing a two-stage conductive polymer bump between a portion of the pad of the at least one conductive electrode having the layer of palladium thereon of the one substrate of the plurality of substrates and a portion of the pad of the at least one conductive electrode of another substrate of the plurality of substrates for forming an electrical contact therebetween.    
     
     
         35 . The method of  claim 34 , wherein disposing a two-stage conductive polymer bump comprises disposing a two-stage conductive polymer bump including palladium therein on a portion of the layer of palladium.  
     
     
         36 . The method of  claim 34 , further comprising: 
 applying a passivation layer over a portion of a surface of the one substrate of the plurality of substrates having the pad of the at least one conductive electrode.    
     
     
         37 . The method of  claim 36 , further comprising: 
 etching a portion of the passivation layer to expose a portion the pad of the at least one conductive electrode.    
     
     
         38 . The method of  claim 34 , wherein disposing a two-stage conductive polymer bump comprises disposing a two-stage epoxy bump on a portion of the layer of palladium.  
     
     
         39 . The method of  claim 34 , wherein applying the layer of palladium on a portion of the pad of the at least one conductive electrode of the one substrate comprises: 
 immersing the one substrate of the plurality of substrates in an electroless plating solution containing palladium dispersed therein.    
     
     
         40 . The method of  claim 34 , wherein disposing a two-stage conductive polymer bump comprises applying a layer of a polymer with a silk screen to form the two-stage conductive polymer bump.  
     
     
         41 . The method of  claim 34 , wherein disposing a two-stage conductive polymer bump comprises applying multiple layers of a polymer with a silk screen to form the two-stage conductive polymer bump.  
     
     
         42 . The method of  claim 34 , wherein the one substrate of the plurality of substrates comprises a silicon wafer.  
     
     
         43 . The method of  claim 34 , wherein the one substrate of the plurality of substrates comprises a printed circuit board.

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