US2005100094A1PendingUtilityA1
Buffer management in variable bit-rate compression systems
Priority: Dec 28, 1994Filed: Dec 3, 2004Published: May 12, 2005
Est. expiryDec 28, 2014(expired)· nominal 20-yr term from priority
Inventors:Gerrit J. Keesman
H04N 19/61H04N 19/152H04N 19/184H04N 19/146H04N 19/50H04N 19/14H04N 19/115H04N 21/44004H04N 21/23406H04N 19/124H04N 19/177H04Q 11/04
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Claims
Abstract
A method of compression is provided for transmission of digital video signals between an encoder buffer and a decoder buffer. A tunable delay is provided at the encoder, suitably in the form of a portion of encoder buffer memory, with data being read out to a communications channel at a rate determined by the input bit rate of signals received a predetermined number of frame periods later. Use of the tunable delay improves efficiency of decoder buffering by maintaining a relatively constant level of decoder buffer fullness irrespective of signal bit rates.
Claims
exact text as granted — not AI-modified1 - 8 . (canceled)
9 . A video signal decoding apparatus for decoding a received digital video signal for transmission, the apparatus comprising:
an decoder stage for decoding a received video signal according to a predetermined coding algorithm and producing the decoded video signal as a variable bit-rate data stream at an output of said decoder stage; a buffer coupled to receive said variable bit-rate data stream from the decoder stage and arranged to output a data signal corresponding thereto for transmission; and a detector coupled to said decoder stage to detect the bit-rate of said variable bit-rate data stream, a processor to derive a second bit rate as a percentage of the detected bit-rate, which percentage changes in inverse relation to changes in the detected bit rate, a buffer control to control said buffer to produce said output data signal at second bit rate, and transmit the output data signal to a decoder buffer at the second bit rate; wherein the detected bit rate and said second bit rate are variable.
10 . An apparatus according to claim 9 , wherein the decoder stage is configured to decode the received video signal in accordance with the MPEG standard.
11 . An apparatus according to claim 9 , wherein said means for detecting a bit rate stores a plurality of contiguous ranges of bit rate values and, on first detecting a dencoder output bit rate falling within a first of said ranges, maintains the derived second bit rate substantially constant until a detected encoder output bit rate falls with another of said ranges.Join the waitlist — get patent alerts
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