US2005098894A1PendingUtilityA1

Semiconductor device and the fabricating method thereof

Assignee: SEMICONDUCTOR ENERGY LABPriority: Apr 1, 1999Filed: Dec 16, 2004Published: May 12, 2005
Est. expiryApr 1, 2019(expired)· nominal 20-yr term from priority
H10W 20/081H10W 20/031H10W 20/063H10D 30/6743H10D 30/6737H10D 30/6729H10D 86/481H10D 86/451H10D 86/441H10D 86/60H10D 30/6725G02F 1/136227
43
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Claims

Abstract

The object is to pattern extremely fine integrated circuits by forming fine contact holes. The dry etching method is employed to form contact holes to pattern a wiring ( 114 ), using a mask made of metallic film ( 112 ) and an organic material as an inter-layer insulating film ( 111 ) for covering switching elements and each of the wirings.

Claims

exact text as granted — not AI-modified
1 - 12 . (canceled)  
   
   
       13 . A method for fabricating a semiconductor device comprising the steps of: 
 forming a thin film transistor over a substrate having an insulating surface;    forming an inter-layer insulating film comprising an organic material over said thin film transistor;    forming a first metallic film over said inter-layer insulating film;    patterning said first metallic film to form a first metallic layer;    etching said inter-layer insulating film to form a contact hole therein by using said first metallic layer as a mask;    forming a second metallic film to cover said first metallic layer and said contact hole, and    patterning said first metallic layer and said second metallic film to form wiring, wherein a part of said wiring has a multi-layer structure.    
   
   
       14 . The method for fabricating a semiconductor device according to  claim 13 , wherein said organic material is an organic-based resin material predominantly selected from the group consisting of polyimide, polyimide-amide, polyamide, acrylics, and BCB (benzocyclobutane).  
   
   
       15 . The method for fabricating a semiconductor device according to  claim 13 , wherein said first metallic film and said second metallic film are deposited by a sputtering method.  
   
   
       16 . A method for fabricating a semiconductor device comprising the steps of: 
 forming a first conductive layer on an insulating surface;    forming an inter-layer insulating film comprising an organic material over said first conductive layer;    forming a first metallic film over said inter-layer insulating film;    patterning said first metallic film to form a first metallic layer;    etching said inter-layer insulating film to form a contact hole by using said first metallic layer as a mask;    forming a second metallic film over said first metallic layer and said contact hole;    forming an inorganic film over said second metallic film;    patterning said first metallic layer, said second metallic film, and said inorganic film to form a wiring having an inorganic layer on the upper surface thereof, and    forming a second conductive layer in contact with said wiring to form a capacitor between said wiring and said second conductive layer with said inorganic layer as a dielectric substance.    
   
   
       17 . The method for fabricating a semiconductor device according to  claim 16 , wherein said inorganic film is deposited by a CVD method.  
   
   
       18 . The method for fabricating a semiconductor device according to  claim 16 , wherein said first metallic film and said second metallic film are deposited by a sputtering method.  
   
   
       19 - 24 . (canceled)  
   
   
       25 . A method for fabricating a semiconductor device comprising the steps of: 
 forming a thin film transistor over a substrate having an insulating surface;    forming an inter-layer insulating film comprising an organic material over said thin film transistor;    forming a first layer over said inter-layer insulating film;    forming contact holes in said inter-layer insulating film by etching said inter-layer insulating;    forming a second layer over said first layer and said contact holes; and    patterning said first layer and said second layer to form wirings, wherein part of said wirings has a multi-layer structure.    
   
   
       26 . The method for fabricating a semiconductor device according to  claim 25 , wherein said inorganic film is deposited by a CVD method.  
   
   
       27 . The method for fabricating a semiconductor device according to  claim 25 , wherein said first layer and said second layer are deposited by a sputtering method.  
   
   
       28 . A method for manufacturing a semiconductor device comprising the steps of: 
 forming an interlayer insulating film over a transistor;    forming a first metallic film over said interlayer insulating film;    patterning said first metallic film to form a first metallic layer;    etching said interlayer insulating film to form a contact hole therein by using said first metallic layer as a mask;    forming a second metallic film on said first metallic layer and in said contact hole wherein said second metallic film is electrically connected to said transistor through said contact hole;    patterning said first metallic layer and said second metallic film to form a wiring,    wherein said wiring includes a portion of said first metallic layer and a portion of said second metallic film.    
   
   
       29 . The method according to  claim 28  wherein said interlayer insulating film comprises an organic material.  
   
   
       30 . The method according to  claim 28  wherein said transistor is a thin film transistor.  
   
   
       31 . A method for manufacturing a semiconductor device comprising the steps of: 
 forming an interlayer insulating film over a conductive layer;    forming a first metallic film over said interlayer insulating film;    patterning said first metallic film to form a first metallic layer;    etching said interlayer insulating film to form a contact hole therein by using said first metallic layer as a mask;    forming a second metallic film on said first metallic layer and in said contact hole wherein said second metallic film is electrically connected to said conductive layer through said contact hole;    patterning said first metallic layer and said second metallic film to form a wiring,    wherein said wiring includes a portion of said first metallic layer and a portion of said second metallic film.    
   
   
       32 . The method according to  claim 31  wherein said interlayer insulating film comprises an organic material.  
   
   
       33 . A method for manufacturing a semiconductor device comprising the steps of: 
 forming an interlayer insulating film over a first conductive layer;    forming a first metallic film over said interlayer insulating film;    patterning said first metallic film to form a first metallic layer;    etching said interlayer insulating film to form a contact hole therein by using said first metallic layer as a mask;    forming a second metallic film on said first metallic layer and in said contact hole wherein said second metallic film is electrically connected to said first conductive layer through said contact hole;    forming a second insulating film on said second metallic film;    patterning said second insulating film, said first metallic layer and said second metallic film to form a wiring wherein a surface of the wiring is covered with a portion of said second insulating film; and    forming a second conductive layer on said second insulating film to form a capacitor between said second conductive layer and said wiring with said portion of said second insulating film interposed therebeween,    wherein said wiring includes a portion of said first metallic layer and a portion of said second metallic film.    
   
   
       34 . The method according to  claim 33  wherein said interlayer insulating film comprises an organic material.

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