US2005098863A1PendingUtilityA1

Lead frame and method for fabricating semiconductor package employing the same

Priority: Nov 6, 2003Filed: Jun 15, 2004Published: May 12, 2005
Est. expiryNov 6, 2023(expired)· nominal 20-yr term from priority
Inventors:Tae Hun Kim
H10W 90/756H10W 74/10H10W 74/00H10W 72/5363H10W 72/536H10W 70/04H10W 70/421H10W 70/40Y10S438/94
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Claims

Abstract

A lead frame and a method of fabricating a semiconductor package including the lead frame, where the lead frame includes a die pad, a tie bar supporting the die pad, and a plurality of leads. The leads may include inner and outer leads arranged along an outer periphery of the die pad, with each of the inner and outer leads having tip terminals. The lead frame may include a connecting bar connected to tip terminals of each of the inner leads. In the method, a bonding pad of a semiconductor chip is mounted on the die pad and connected via a conductive wire to the inner leads of the lead frame. The semiconductor chip, wire and inner leads may be subjected to a molding process, and the connecting bar which connects the tip terminals of the inner leads may be cut so as to independently separate each of the inner leads from the die pad.

Claims

exact text as granted — not AI-modified
1 . A lead frame, comprising: 
 a die pad;    a tie bar supporting the die pad;    a plurality of leads including inner and outer leads arranged along an outer periphery of the die pad, each of the inner and outer leads having tip terminals; and    a connecting bar connected to tip terminals of each of the inner leads.    
   
   
       2 . The lead frame of  claim 1 , wherein the inner and outer leads are arranged along the outer periphery of the die pad so as to be a given spaced interval from outer edges of the die pad.  
   
   
       3 . The lead frame of  claim 1 , wherein the died pad is configured for mounting a semiconductor chip thereon.  
   
   
       4 . The lead frame of  claim 1 , wherein a width of the inner leads is less than a width of the outer leads.  
   
   
       5 . The lead frame of  claim 1 , wherein each of the inner leads are separated in space from adjacent inner leads so as to translate an applied external force to the lead frame across each of the individual, separated leads, maintaining bonding integrity of the leads.  
   
   
       6 . A method for fabricating a semiconductor package, comprising: 
 preparing a lead frame, the lead frame including a die pad, inner and outer leads arranged along an outer periphery of the die pad and having tip terminals, and a connecting bar for connecting tip terminals of the inner leads;    mounting a bonding pad of a semiconductor chip on the die pad;    connecting the bonding pad to at least one tip terminal of an inner lead via a wire;    molding the semiconductor chip, wire and inner leads; and    cutting the connecting bar which connects the tip terminals of the inner leads so as to independently separate each of the inner leads from the die pad.    
   
   
       7 . The method of  claim 6 , wherein preparing the lead frame includes fabricating the lead frame by one of a stamping process or an etching process.  
   
   
       8 . The method of  claim 6 , wherein the connecting bar is cut by one of a sawing blade or a laser.  
   
   
       9 . The method of  claim 6 , wherein cutting the connecting bar further includes cutting a bottom surface of the package by reversing the package, after the package is subject to the molding process, in the moving direction of a sawing device that cuts the connecting bar.  
   
   
       10 . A method for fabricating a semiconductor package, comprising: 
 preparing a lead frame, the lead frame including a die pad, inner and outer leads arranged along an outer periphery of the die pad and having tip terminals, and a connecting bar for connecting tip terminals of the inner leads;    mounting a bonding pad of a semiconductor chip on the die pad;    connecting the bonding pad to at least one tip terminal of an inner lead via a wire;    cutting the connecting bar which connects the tip terminals of the inner leads so as to independently separate each of the inner leads from the die pad and from each other; and    molding the semiconductor chip, wire and the inner leads with molding resin.    
   
   
       11 . A lead frame, comprising: 
 a die pad;    a tie bar supporting the die pad;    a plurality of leads arranged along an outer periphery of the die pad connecting the die pad to the outer frame, each of the leads having tip terminals;    an outer frame supporting the die pad, tie bar and plurality of leads; and    a connecting bar connected to tip terminals of at least some of the leads.    
   
   
       12 . The lead frame of  claim 1   1 , wherein the died pad is configured for mounting a semiconductor chip thereon.  
   
   
       13 . The lead frame of  claim 1   1 , wherein the plurality of leads include inner leads and outer leads which are arranged along the outer periphery of the die pad so as to be a given spaced interval from outer edges of the die pad.  
   
   
       14 . The lead frame of  claim 13 , wherein a width of the inner leads is less than a width of the outer leads.  
   
   
       15 . The lead frame of  claim 13 , wherein 
 the connecting bar is connected to tip terminals of the inner leads, and    each of the inner leads are separated in space from adjacent inner leads so as to translate an applied external force to the lead frame across each of the individual, separated leads, maintaining bonding integrity of the leads.    
   
   
       16 . A method for fabricating a semiconductor package that includes a lead frame, the lead frame having a die pad, inner and outer leads arranged along an outer periphery of the die pad and having tip terminals, and a connecting bar for connecting tip terminals of the inner leads to the die pad, the method comprising: 
 connecting, via a conductive wire, a bonding pad of a semiconductor chip to be mounted on the die pad of the lead frame to the inner leads of the lead frame;    molding the semiconductor chip, wire and inner leads; and    cutting the connecting bar which connects the tip terminals of the inner leads so as to independently separate each of the inner leads from the die pad.    
   
   
       17 . The method of  claim 16 , wherein said molding is performed prior to said cutting.  
   
   
       18 . The method of  claim 16 , wherein said cutting is performed prior to said molding.  
   
   
       19 . A semiconductor package, comprising: 
 an outer frame supporting a die pad, a tie bar for mounting a semiconductor chip thereon and a plurality of leads;    the plurality of leads including inner and outer leads arranged along an outer periphery of the die pad to connect the die pad to the outer frame, each of the inner and outer leads having tip terminals;    a connecting bar connected to tip terminals of the inner leads; and    a semiconductor chip including a bonding pad that is connected to the die pad via a wire that connects the bonding pad to the inner leads.    
   
   
       20 . A semiconductor package, the semiconductor package having a lead frame and a semiconductor chip, the lead frame composed of an outer frame supporting a die pad, a tie bar for mounting the semiconductor chip thereon, a plurality of inner and outer leads arranged along an outer periphery of the die pad to connect the die pad to the outer frame, each of the inner and outer leads having tip terminals, and a connecting bar for connecting tip terminals of the inner leads to the die pad, the semiconductor package formed in accordance with the method of  claim 16.

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