US2005098841A1PendingUtilityA1

Nanopore chip with n-type semiconductor

Priority: Oct 24, 2003Filed: Dec 13, 2004Published: May 12, 2005
Est. expiryOct 24, 2023(expired)· nominal 20-yr term from priority
B81B 2201/058G01N 33/48721B81B 2203/0127B81C 1/00087
41
PatentIndex Score
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Claims

Abstract

An apparatus and method for making a nanopore chip exhibiting one of low photosensitivity, low electrical noise, and low electrical drift. The apparatus provides a thin insulating diaphragm containing a nanopore, the diaphragm being supported on a rigid semiconductor frame, the semiconductor frame having N-type doping in those regions which are to be capacitively coupled to an ionic solution. Also disclosed is a method of making the apparatus.

Claims

exact text as granted — not AI-modified
1 - 11 . (canceled)  
   
   
       12 . A nanopore apparatus comprising: 
 a diaphragm; and    a semiconductor frame for supporting said diaphragm, wherein said semiconductor frame comprises an n-type semiconductor.    
   
   
       13 . A nanopore apparatus as recited in  claim 12 , wherein said apparatus comprises a microscale device disposed in or on said diaphragm.  
   
   
       14 . A nanopore apparatus as recited in  claim 12 , wherein said apparatus comprises a nanoscale device disposed in or on said diaphragm.  
   
   
       15 . A nanopore apparatus as recited in  claim 12 , wherein said apparatus comprises a nanopore disposed in said diaphragm.  
   
   
       16 . A nanopore apparatus as recited in  claim 12 , wherein said diaphragm is an insulating diaphragm.  
   
   
       17 . A nanopore apparatus as recited in  claim 12 , wherein said n-type semiconductor is doped with a dopant having a resistivity ranging from 0.002 Ohm-cm to 10,000 Ohm-cm.  
   
   
       18 . A nanopore apparatus as recited in  claim 17 , wherein said n-type semiconductor is doped with a dopant having a resistivity ranging from 1 Ohm-cm to 50 Ohm-cm.  
   
   
       19 . A nanopore apparatus as recited in  claim 12 , wherein said n-type semiconductor comprises silicon.  
   
   
       20 . A nanopore apparatus as recited in  claim 19 , wherein said silicon comprising n-type semiconductor is doped with a dopant chosen from a group comprising phospohorous and arsenic.  
   
   
       21 . A nanopore apparatus as recited in  claim 12 , wherein said n-type semiconductor is chosen from a group comprising germanium and gallium arsenide.  
   
   
       22 . A nanopore apparatus as recited in  claim 21 , wherein said n-type semiconductor is doped with a dopant chosen from a group comprising phospohorous and arsenic.  
   
   
       23 . A nanopore apparatus as recited in  claim 12 , wherein said apparatus is a chip apparatus.  
   
   
       24 . A nanopore apparatus comprising: 
 (a) a diaphragm;    (b) a semiconductor frame for supporting said diaphragm, wherein said semiconductor frame comprises an n-type semiconductor; and    (c) an aqueous fluid contacting said diaphragm.    
   
   
       25 . A nanopore apparatus as recited in  claim 24 , wherein said apparatus comprises a microscale device disposed in or on said diaphragm.  
   
   
       26 . A nanopore apparatus as recited in  claim 24 , wherein said apparatus comprises a nanoscale device disposed in or on said diaphragm.  
   
   
       27 . A nanopore apparatus as recited in  claim 24 , wherein said apparatus comprises a nanopore disposed in said diaphragm.  
   
   
       28 . A nanopore apparatus as recited in  claim 24 , wherein said diaphragm is an insulating diaphragm.  
   
   
       29 . A nanopore apparatus as recited in  claim 24 , wherein said n-type semiconductor is doped with a dopant having a resistivity ranging from 0.002 Ohm-cm to 10,000 Ohm-cm.  
   
   
       30 . A nanopore apparatus as recited in  claim 29 , wherein said n-type semiconductor is doped with a dopant having a resistivity ranging from 1 Ohm-cm to 50 Ohm-cm.  
   
   
       31 . A nanopore apparatus as recited in  claim 24 , wherein said n-type semiconductor comprises silicon.  
   
   
       32 . A nanopore apparatus as recited in  31 , wherein said silicon comprising n-type semiconductor is doped with a dopant chosen from a group comprising phospohorous and arsenic.  
   
   
       33 . A nanopore apparatus as recited in  claim 24 , wherein said n-type semiconductor is chosen from a group comprising germanium and gallium arsenide.  
   
   
       34 . A nanopore apparatus as recited in  claim 24 , wherein said n-type semiconductor is doped with a dopant chosen from a group comprising phospohorous and arsenic.  
   
   
       35 . A method for making a nanopore apparatus comprising: 
 providing a semiconductor frame comprising an n-type semiconductor, and    positioning a diaphragm in contact with said semiconductor frame.    
   
   
       36 . A method as recited in  claim 35 , wherein the n-type semiconductor comprises silicon.  
   
   
       37 . A method as recited in  claim 36 , wherein the silicon is doped with a dopant chosen from a group comprising phospohorous and arsenic.  
   
   
       38 . A method as recited in  claim 35 , wherein a microscale or nanoscale device is present in or on said diaphragm.  
   
   
       39 . A method as recited in  claim 38 , wherein said microscale or nanoscale device comprises a nanopore.  
   
   
       40 . A method comprising: 
 (a) providing an apparatus comprising: 
 (i) a diaphragm having a nanopore disposed therein;  
 (ii) a semiconductor frame for supporting said diaphragm, wherein said semiconductor frame comprises an n-type semiconductor; and  
 (iii) an aqueous solution in contact with said diphragm;  
   (b) applying a voltage across said nanopore; and    (c) measuring the resultant current.

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