US2005098806A1PendingUtilityA1

Method of forming an angled pinned photodiode for high quantum efficiency

Assignee: MICRON TECHNOLOGY INCPriority: Jul 30, 2003Filed: Dec 13, 2004Published: May 12, 2005
Est. expiryJul 30, 2023(expired)· nominal 20-yr term from priority
H10F 39/803H10F 39/802H10F 39/12
45
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Claims

Abstract

A pinned photodiode with a surface layer of a first conductivity type laterally displaced from an electrically active area of a gate structure and a charge collection region of a second conductivity type formed by an angled implant is disclosed. The angle of the charge collection region implant may be tailored so that the charge collection region contacts an adjacent edge of the transfer gate of the pixel sensor cell and minimizes, therefore, the gate overlap region and an undesirable barrier potential.

Claims

exact text as granted — not AI-modified
1 - 31 . (canceled)  
   
   
       32 . A method of forming a photodiode for a pixel sensor cell, said method comprising: 
 forming a gate of a transistor over a substrate;    forming a first doped layer of a first conductivity type in said substrate, said first doped layer being displaced laterally from an electrically active portion of said gate by a predetermined distance; and    forming a doped region of a second conductivity type in said substrate and below said first doped layer by implanting ions of said second conductivity type in a first direction and at an incidence angle with said substrate different than a zero degree angle in a first area of said substrate below said first doped layer.    
   
   
       33 . The method of  claim 32 , wherein said first doped layer is formed by implanting ions of said first conductivity type at an incidence angle with said substrate different than a zero degree angle.  
   
   
       34 . The method of  claim 32 , wherein said first doped layer is formed by implanting ions of said first conductivity type at an incidence angle with said substrate of about zero degree angle.  
   
   
       35 . The method of  claim 32 , wherein said first direction is a right-to-left direction relative to said gate and into said substrate.  
   
   
       36 . The method of  claim 32 , wherein said first doped layer has an implant dose within the range of from about 1×1012 to about 1×1014 atoms per cm2.  
   
   
       37 . The method of  claim 32 , wherein said first doped layer is formed to be laterally displaced from said electrically active portion of said gate by about 0 Angstroms to about 5,000 Angstroms.  
   
   
       38 . The method of  claim 37 , wherein said first doped layer is formed to be laterally displaced from said electrically active portion of said gate by about 300 Angstroms to about 3,000 Angstroms.  
   
   
       39 . The method of  claim 32 , wherein said act of forming said first doped layer further comprises forming a photoresist layer over said substrate and said gate, and patterning and etching said photoresist layer to expose a second area of said substrate, said second area being located between said gate and said at least one isolation region, said second area being spaced from said gate by said predetermined distance.  
   
   
       40 . The method of  claim 32 , wherein said act of forming said doped region of said second conductivity type further comprises forming a photoresist layer over said substrate and said gate, and patterning and etching said photoresist layer to expose said first area of said substrate located between a sidewall of said gate and said at least one isolation region.  
   
   
       41 . The method of  claim 32 , wherein said act of implanting ions of said second conductivity type further comprises directing a dopant at said incidence angle which is different than a zero degree angle in said first area of said substrate located between said gate and said at least one isolation region.  
   
   
       42 . The method of  claim 32 , wherein said doped region has an implant dose within the range of from about 1×1011 to about 1×1014 atoms per cm2.  
   
   
       43 . The method of  claim 32 , wherein said first conductivity type is p-type and said second conductivity type is n-type.  
   
   
       44 . The method of  claim 32 , wherein said photodiode is a p-n-p photodiode.  
   
   
       45 . The method of  claim 32 , wherein said photodiode is part of a CMOS imager.  
   
   
       46 . The method of  claim 32 , wherein said photodiode is part of a CCD imager.  
   
   
       47 . A method of forming a photodiode, said method comprising: 
 forming at least one shallow trench isolation region in a silicon substrate;    forming a transistor gate over said silicon substrate and spaced apart from said at least one shallow trench isolation region;    forming a first doped layer of a first conductivity type in said silicon substrate;    forming a second doped layer of said first conductivity type in said first doped layer by implanting ions in a first direction and at an incidence angle with said silicon substrate other than zero degrees, said second doped layer being in contact with said isolation region and being displaced laterally from an electrically active area of said transistor gate by a predetermined distance; and    forming a doped region of a second conductivity type in said first doped layer by implanting ions in a second direction and at an incidence angle with said silicon substrate other than zero degrees.    
   
   
       48 . The method of  claim 47 , wherein said second doped layer has an implant dose within the range of from about 1×1012 to about 1×1014 atoms per cm2.  
   
   
       49 . The method of  claim 47 , wherein said second doped layer is laterally displaced from said electrically active area of said transistor gate by about 0 Angstroms to about 5,000 Angstroms.  
   
   
       50 . The method of  claim 49 , wherein said second doped layer is laterally displaced from said electrically active area of said transistor gate by about 300 Angstroms to about 3,000 Angstroms.  
   
   
       51 . The method of  claim 47 , wherein said act of forming said doped region further comprises forming at least a portion of said doped region between said second doped layer and said transfer gate.  
   
   
       52 . The method of  claim 47 , wherein said doped region has an implant dose within the range of from about 1×1011 to about 1×1014 atoms per cm2.  
   
   
       53 . The method of  claim 47 , wherein said first direction is opposite said second direction.  
   
   
       54 . The method of  claim 47 , wherein said photodiode is part of a CMOS imager.  
   
   
       55 . The method of  claim 47 , wherein said photodiode is part of a CCD imager.  
   
   
       56 . A method of forming a p-n-p photodiode, said method comprising: 
 forming at least one field oxide region in a substrate;    forming a transistor gate over said substrate and spaced apart from said at least one field oxide region;    forming a first p-type doped layer in said substrate;    forming a photoresist layer over said transistor gate and said field oxide region;    patterning said photoresist layer to form a first opening extending between a first location and a second location, said first location corresponding to a first point over a photodiode area and said second location corresponding to a second point over said field oxide region;    conducting a first angled implant through said first opening to form a p-type surface layer in said first p-type doped layer, said p-type surface layer being laterally displaced from an electrically active area of a gate structure formed over said substrate; and    conducting a second angled implant to form an n-type doped region in said first p-type doped layer, said n-type doped region being located below said p-type surface layer.    
   
   
       57 . The method of  claim 56 , wherein said p-type surface layer is displaced laterally from said electrically active area of said transistor gate by a predetermined distance.  
   
   
       58 . The method of  claim 56 , wherein said predetermined distance is of about 0 Angstroms to about 5,000 Angstroms.  
   
   
       59 . The method of  claim 56 , wherein said p-type surface layer has an implant dose within the range of from about 1×1012 to about 1×1014 atoms per cm2.  
   
   
       60 . The method of  claim 56 , wherein said n-type doped region has an implant dose within the range of from about 1×1011 to about 1×1014 atoms per cm2.  
   
   
       61 . The method of  claim 56 , wherein said p-n-p photodiode is part of a CMOS imager.  
   
   
       62 . The method of  claim 56 , wherein said p-n-p photodiode is part of a CCD imager.

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