Fabrication method of semiconductor integrated circuit device

Abstract

To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.

1 . A fabrication method of a semiconductor integrated circuit device, comprising the steps of: 
 (a) preparing a semiconductor wafer which has been partitioned into a plurality of chip regions each having a semiconductor integrated circuit formed thereover, and has, formed over the main surface of the wafer, a plurality of first electrodes to be electrically connected to the semiconductor integrated circuit;    (b) preparing a first card comprising a wiring substrate having first interconnects formed thereover; a first sheet having a plurality of contact terminals to be brought into contact with the first electrodes and second interconnects to be electrically connected to the contact terminals, said second interconnects being electrically connected to the first interconnects and tip portions of the contact terminals being fixed to the wiring substrate so as to be opposite to the main surface of the semiconductor wafer; and a pressing mechanism for pressing, from the rear surface of the first sheet, a region of the first sheet in which the contact terminals have been formed; and    (c) performing electrical testing of the semiconductor integrated circuit by bringing the tip portions of the contact terminals into contact with the first electrodes,    wherein each of the tip portions of the contact terminals is disposed over the main surface of the first sheet so as to be opposite to the corresponding one of the first electrodes, and    wherein the first electrodes are arranged in a plurality of rows along the periphery of each of the chip regions and the first electrodes included in the first row and the first electrodes included in the second row are disposed alternately in a direction along the periphery of each of the chip regions.    
   
   
       2 . A fabrication method of a semiconductor integrated circuit device according to  claim 1 , 
 wherein the first electrodes are each a protruding electrode having gold as a main component, has a rectangular shape, in plan view, with long sides and short sides, said long sides extending toward the periphery of the chip region.    
   
   
       3 . A fabrication method of a semiconductor integrated circuit device according to  claim 1 , further comprising a step of: 
 (d) after the step (c), forming a protruding electrode over the first electrodes.    
   
   
       4 . A fabrication method of a semiconductor integrated circuit device according to  claim 1 , 
 wherein the semiconductor integrated circuit device includes an LCD driver.    
   
   
       5 . A fabrication method of a semiconductor integrated circuit device according to  claim 1 , 
 wherein in the first sheet, the second interconnects are formed from a plurality of interconnect layers.    
   
   
       6 . A fabrication method of a semiconductor integrated circuit device comprising the steps of: 
 (a) preparing a semiconductor wafer which has been partitioned into a plurality of chip regions each having a semiconductor integrated circuit formed thereover, and has, formed over the main surface of the wafer, a plurality of first electrodes to be electrically connected to the semiconductor integrated circuit;    (b) preparing a first card comprising a wiring substrate having first interconnects formed thereover; a first sheet having a plurality of contact terminals to be brought into contact with the first electrodes and second interconnects to be electrically connected to the contact terminals, said second interconnects being electrically connected to the first interconnects and tip portions of the contact terminals being fixed to the wiring substrate so as to be opposite to the main surface of the semiconductor wafer; and a pressing mechanism for pressing, from the rear surface of the first sheet, a region of the first sheet in which the contact terminals have been formed; and    (c) performing electrical testing of the semiconductor integrated circuit by bringing the tip portions of the contact terminals into contact with the first electrodes,    wherein each of the tip portions of the contact terminals is disposed over the main surface of the first sheet so as to be opposite to the corresponding one of the first electrodes, wherein said first sheet is formed by the steps:    (b-1) preparing a first substrate having crystallizability;    (b-2) selectively and anisotropically etching the first substrate to form a plurality of first holes in the pyramid or trapezoidal pyramid form;    (b-3) over each of the first holes, selectively forming a plurality of first metal films to fill therewith the first holes;    (b-4) forming a first polyimide film over the first substrate and the first metal films;    (b-5) selectively etching the first polyimide film to form a plurality of first opening portions reaching the first metal films;    (b-6) forming, over the first polyimide film, a second metal film to embed therewith the first opening portions and patterning the second metal film to form the second interconnects to be electrically connected to the first metal films;    (b-7) forming a second polyimide film over the second interconnects and the first polyimide film;    (b-8) bonding a second sheet onto the first substrate, forming a second opening portion in the second sheet over the first metal film, and forming a third opening portion in the second sheet over a first region, in which the first metal film has not been formed, over the first substrate;    (b-9) forming, in the second opening portion, an elastic material to embed therewith the second opening portion while the second sheet being bonded to the first substrate;    (b-10) removing the first substrate and forming the contact terminals from the first metal films; and    (b-11) removing the second polyimide film and the first polyimide film below the third opening portion, and    wherein the second sheet has a linear expansion coefficient similar to that of the semiconductor wafer.    
   
   
       7 . A fabrication method of a semiconductor integrated circuit device according to  claim 6 , 
 wherein the second sheet is formed from  42  alloy or invar.    
   
   
       8 . A fabrication method of a semiconductor integrated circuit device according to  claim 6 , 
 wherein the first metal film includes a first metal layer and a second metal layer,    wherein the step (b3) further comprises the steps of forming the first metal layer over the first substrate and forming the second metal layer over the first metal layer, and    wherein the first metal layer has higher hardness than the second metal layer and has oxidation resistance.    
   
   
       9 . A fabrication method of a semiconductor integrated circuit device according to  claim 8 , 
 wherein the first metal layer has rhodium as a main component, and    wherein the second metal layer has nickel or copper as a main component.    
   
   
       10 . A fabrication method of a semiconductor integrated circuit device according to  claim 9 , 
 wherein the first metal layer has a thickness of from 1 μm to 4 μm.    
   
   
       11 . A fabrication method of a semiconductor integrated circuit device comprising the steps of: 
 (a) preparing a semiconductor wafer which has been partitioned into a plurality of chip regions each having a semiconductor integrated circuit formed thereover, and has, formed over the main surface of the wafer, a plurality of first electrodes to be electrically connected to the semiconductor integrated circuit;    (b) preparing a first card comprising a wiring substrate having first interconnects formed thereover; a first sheet having a plurality of contact terminals to be brought into contact with the first electrodes and second interconnects to be electrically connected to the contact terminals, said second interconnects being electrically connected to the first interconnects and tip portions of the contact terminals being fixed to the wiring substrate so as to be opposite to the main surface of the semiconductor wafer; and a pressing mechanism for pressing, from the rear surface of the first sheet, a region of the first sheet in which the contact terminals have been formed; and    (c) performing electrical testing of the semiconductor integrated circuit by bringing the tip portions of the contact terminals into contact with the first electrodes,    wherein each of the tip portions of the contact terminals is disposed over the main surface of the first sheet so as to be opposite to the corresponding one of the first electrodes, and    wherein the tip portions of the contact terminals each has a height greater than the particle size of a dust which adheres to the semiconductor wafer during the manufacturing step of the semiconductor integrated circuit device.    
   
   
       12 - 20 . (canceled)