Method of forming an electrical contact

Abstract

In a test system, a silicon interconnect is provided that can accommodate a packaged part, such as a Land Grid Array (LGA) package. The interconnect can be made by etching a silicon substrate to form projections therefrom; forming an insulation or passivation layer through deposition or growth; depositing a seed layer over the insulation layer; depositing a metal layer over the seed layer; and etching contact members from the seed and metal layers using a single mask step. In a preferred embodiment, the metal layer is coated with another metal layer that matches the metal of the packaged part's electrical communication nodes. In one embodiment, the contact surfaces of the silicon contact are plated in gold and are planar. Included within the scope of the current invention are at least one method of testing an LGA package and at least one method of allowing electrical communication with a packaged part.

1 . A method of processing a substrate comprising: 
 masking at least portions of the substrate using a first mask patterned after a configuration of electrical communication nodes of an LGA package;    etching a plurality of projections from the substrate;    forming at least two metal layers over the plurality of projections;    forming a plurality of contact members, corresponding to the plurality of projections from the at least two metal layers using solely one additional patterned mask; and    etching an unmasked portion of the at least two metal layers.    
   
   
       2 . The method in  claim 1 , wherein: 
 the method further comprises forming an insulation/passivation layer over at least portions of the substrate including the plurality of projections;    the forming of at least two metal layers over the plurality of projections comprising forming the at least two metal layers over at least portions of the insulation/passivation layer; and    the etching an unmasked portion of the at least two metal layers further comprising etching the at least two metal layers without etching the insulation/passivation layer.    
   
   
       3 . The method in  claim 2 , wherein the forming an insulation/passivation layer comprises including the first mask as at least a portion of the insulation/passivation layer.  
   
   
       4 . A method of coating an interconnect projection on a substrate comprising: 
 forming a seed layer over the interconnect projection on the substrate;    forming a copper layer over the seed layer; and    forming a gold layer directly over the copper layer, the gold layer including a flat top.    
   
   
       5 . The method in  claim 4 , wherein the forming a copper layer comprises electroplating copper onto the seed layer.  
   
   
       6 . The method in  claim 4 , wherein the forming a copper layer comprises sputtering copper onto the seed layer.  
   
   
       7 . The method in  claim 6 , wherein the forming a seed layer further comprises sputtering tungsten over the interconnect projection.  
   
   
       8 . A process method for an electrical contact for a die having an electrical communication node, the electrical communication node having a known shape formed from a known material, the method comprising: 
 forming a support structure for forming a contact for the known shape of the electrical communication node of the die;    forming a portion of the support structure to have a shape for contacting a portion of the electrical communication node of the die;    forming an aluminum layer over a portion of the support structure formed to have a shape for contacting a portion of the electrical communication node of the die;    forming a zinc layer; and    forming a contact surface, the contact surface of the same material as the material of the electrical communication node of the die.    
   
   
       9 . The method in  claim 8 , further comprising forming the zinc layer after forming an aluminum layer and before forming a contact surface.  
   
   
       10 . The method in  claim 9 , further comprising forming a nickel layer after forming a zinc layer and before the forming a contact surface.  
   
   
       11 . The method in  claim 10 , wherein forming an aluminum layer comprises sputtering aluminum over the support structure.  
   
   
       12 . The method in  claim 11 , wherein forming a zinc layer comprises exposing the aluminum layer to a zincate solution.  
   
   
       13 . The method in  claim 12 , wherein forming a nickel layer comprises exposing the zinc layer to a nickel solution.  
   
   
       14 . The method in  claim 13 , wherein the forming a contact surface comprises providing a selection of one of a gold surface and a palladium surface.  
   
   
       15 . The method in  claim 13 , wherein the forming a contact surface comprises forming a contact surface essentially matching the shape of the electrical communication node of the die.  
   
   
       16 . The method in  claim 15 , wherein forming a contact surface comprises forming an essentially flat contact surface.  
   
   
       17 . A substrate processing method comprising: 
 masking at least portions of a substrate using a first mask having a pattern for forming electrical communication nodes for an LGA package;    etching a plurality of projections from the substrate;    forming at least two metal layers over the plurality of projections;    forming a plurality of contact members corresponding to the plurality of projections from the at least two metal layers using a second mask; and    etching an unmasked portion of the at least two metal layers.    
   
   
       18 . The method in  claim 17 , wherein: 
 the method further comprises forming an insulation/passivation layer over at least portions of the substrate including the plurality of projections;    the forming of at least two metal layers over the plurality of projections comprising forming the at least two metal layers over at least portions of the insulation/passivation layer; and    the etching an unmasked portion of the at least two metal layers further comprising etching the at least two metal layers without etching the insulation/passivation layer.    
   
   
       19 . The method in  claim 18 , wherein the forming an insulation/passivation layer comprises including the first mask as at least a portion of the insulation/passivation layer.