US2005093180A1PendingUtilityA1

Chip scale packaged semiconductor device

Assignee: MITSUBISHI ELECTRIC CORPPriority: Mar 18, 2002Filed: Aug 25, 2004Published: May 5, 2005
Est. expiryMar 18, 2022(expired)· nominal 20-yr term from priority
H10W 74/142H10W 72/07251H10W 72/20H10W 74/129H10W 74/01H10W 72/241H10W 74/019H10W 72/0198
33
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Claims

Abstract

A semiconductor wafer and a substrate are positioned facing each other, and electrode pads of individual semiconductor chips and connecting electrode pads of package bases are bonded simultaneously. The semiconductor wafer and the substrate are cut at the same time and divided into semiconductor chips. After expanding spaces between the divided semiconductor chips a predetermined width in an expanding process, a sealing resin is applied so that the large number of semiconductor chips and package bases are sealed with the resin at the same time. Then the semiconductor chips are cut and divided into separate pieces. Thus, semiconductors devices sealed with a resin are formed.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising: 
 semiconductor chips mounted on package bases;    electrode pads provided on said semiconductor chips; and    connecting electrode pads provided on said package bases, said electrode pads being electrically connected to said connecting electrode pads, wherein spaces where said semiconductor chips and said package bases are joined together are filled with a sealing resin, and side faces of said semiconductor chips and said package bases are continuously coated with the sealing resin.    
   
   
       2 . The semiconductor device according to  claim 1 , wherein said sealing resin coats back faces of said semiconductor chips opposed to said package bases.  
   
   
       3 - 5 . (canceled)

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