Test circuit, semiconductor product wafer having the test circuit, and method of monitoring manufacturing process using the test circuit

Abstract

A test circuit and a method of monitoring a manufacturing process of a semiconductor integrated circuit using the test circuit are provided. The test circuit comprises elements to be tested; a selection circuit for sequentially selecting at least one of the elements at a time. The test circuit and pads used for testing the elements are placed within a scribe line on a semiconductor wafer.

1 . A method of monitoring a manufacturing process for manufacturing semiconductor product wafers, comprising: 
 manufacturing semiconductor product wafers by the manufacturing process, each of the product wafers comprising: 
 a plurality of semiconductor product chips placed in respective chip areas arranged on a surface of the semiconductor product wafer; and  
 a test circuit placed within one of scribe lines between the chip areas,  
 the test circuit comprising a plurality of elements to be tested and a selection circuit that sequentially selects at least one of the elements at time;  
 testing each of the elements in the test circuit in at least one of the manufactured semiconductor product wafers; and  
 evaluating results of the testing to monitor the manufacturing process.  
   
   
   
       2 . The method according to  claim 1 , wherein a number of the elements included in the test circuit are sufficiently large to detect a change of a state of the manufacturing process before a decrease of a yield of the semiconductor product chip occurs.  
   
   
       3 . A method of monitoring a manufacturing process for manufacturing semiconductor product wafer, comprising: 
 manufacturing semiconductor product wafers including different types of semiconductor product wafers at an arbitrary ratio in an arbitrary order by the manufacturing process, each of the different types of semiconductor product wafers comprising: 
 a plurality of one of different types of product chips placed in respective chip areas arranged on a surface of the semicondcutor product wafer; and  
   a common test circuit placed within one of scribe lines between the chip areas, the common test circuit comprising a plurality of elements to be tested and a selection circuit that sequentially selects at least one of the elements at a time;    selecting a plurality of the manufactured semiconductor product wafers comprising at least two of the different types of the semiconductor product wafers;    testing each of the elements in the test circuit in the selected semiconductor product wafers; and    evaluating results of the testing to monitor the manufacturing process.    
   
   
       4 . The method according to  claim 3 , wherein a number of elements included in the test circuit are sufficiently large to detect a change of a state of the manufacturing process before a decrease in a yield of the different types of product chips occurs.  
   
   
       5 . The method according to  claim 3 , wherein the evaluating step is performed when a decrease in a yield of at least one of the different types of product chips occurs.  
   
   
       6 . The method according to  claim 3 , further comprising: 
 adjusting the manufacturing process according to a result of the evaluating to prevent occurrence of a decrease in a yield of at least one of the different types of product chips.    
   
   
       7 . The method according to  claim 3 , wherein the plurality of manufactured semiconductor product wafers are selected such that the selected semiconductor product wafers are manufactured with approximately a fixed interval.  
   
   
       8 . The method according to  claim 3 , wherein different customers provide mask patterns used to manufacture the different types of product chips.  
   
   
       9 . A method of monitoring a manufacturing process for manufacturing semiconductor product wafers, comprising: 
 manufacturing semiconductor product wafers, each including a plurality of product chips and a test circuit comprising a plurality of elements to be tested and a selection circuit that sequentially selects at least one of the plurality of elements at a time;    testing each of the elements in the test circuit in at least one of the manufactured semiconductor product wafers;    evaluating results of the testing; and    adjusting the manufacturing process according to the results of the evaluating to prevent occurrence of a decrease in a yield of the product chips.    
   
   
       10 . The method according to  claim 9 , wherein a number of the elements included in the test circuit are sufficiently large to detect a change of a state of the manufacturing process before the decrease in the yield of the product chip occurs.