Capacitor of semiconductor memory device that has composite A12O3/HfO2 dielectric layer and method of manufacturing the same
Abstract
A semiconductor memory device that includes a composite Al 2 O 3 HfO 2 dielectric layer with a layer thickness ratio greater than or equal to 1, and a method of manufacturing the capacitor are provided. The capacitor includes a lower electrode, a composite dielectric layer including an Al 2 O 3 dielectric layer and an HfO 2 dielectric layer sequentially formed on the lower electrode, the Al 2 O 3 dielectric layer having a thickness greater than or equal to the HfO 2 dielectric layer, and an upper electrode formed on the composite dielectric layer. The Al 2 O 3 dielectric layer has a thickness of 30-60 Å. The HfO 2 dielectric layer has a thickness of 40 Å or less.
Claims
exact text as granted — not AI-modified1 . A semiconductor memory device, comprising:
a lower electrode; a composite dielectric layer including an Al 2 O 3 dielectric layer and an HfO 2 dielectric layer sequentially formed on the lower electrode, the Al 2 O 3 dielectric layer having a thickness greater than or equal to the HfO 2 dielectric layer; and an upper electrode formed on the composite dielectric layer.
2 . The semiconductor device of claim 1 , wherein the Al 2 O 3 dielectric layer has a thickness of 30-60 Å.
3 . The semiconductor device of claim 1 , wherein the HfO 2 dielectric layer has a thickness of 40 Å or less.
4 . The semiconductor device of claim 3 , wherein the HfO 2 dielectric layer has a thickness of 10-40 Å.
5 . The semiconductor device of claim 1 , wherein the lower electrode is made of one of polysilicon, metal nitride, and noble metal.
6 . The capacity of claim 5 , wherein the lower electrode is made of one selected from the group consisting of TiN, TaN, WN, Ru, Ir, Pt, and a composite layer of the forgoing materials.
7 . The semiconductor device of claim 1 , wherein the upper electrode is made of one of polysilicon, metal nitride, and noble metal.
8 . The semiconductor device of claim 7 , wherein the upper electrode is made of one selected from the group consisting of TiN, TaN, WN, Ru, Ir, Pt, and a composite layer of the forgoing materials.
9 . The semiconductor device of claim 1 , wherein the lower electrode is made of polysilicon, and a silicon nitride layer is further formed between the lower electrode and the composite dielectric layer.
10 . A semiconductor memory device, comprising:
a lower electrode made of one of metal nitride and noble metal; an upper electrode made of one of metal nitride and noble metal; a composite dielectric layer, formed between the lower electrode and the upper electrode, that includes an Al 2 O 3 dielectric layer and an HfO 2 dielectric layer with a thickness ratio of Al 2 O 3 to HfO 2 that is greater than or equal to 1.
11 . The semiconductor device of claim 10 , wherein the Al 2 O 3 dielectric layer has a thickness of 30-60 Å.
12 . The semiconductor device of claim 10 , wherein the HfO 2 dielectric layer has a thickness of 40 Å or less.
13 . The semiconductor device of claim 12 , wherein the HfO 2 dielectric layer has a thickness of 10-40 Å.
14 . The semiconductor device of claim 10 , wherein the lower electrode is made of one selected from the group consisting of TiN, TaN, WN, Ru, Ir, Pt, and a composite layer of the forgoing materials.
15 . The semiconductor device of claim 10 , wherein the upper electrode is made of one selected from the group consisting of TiN, TaN, WN, Ru, Ir, Pt, and a composite layer of the forgoing materials.Join the waitlist — get patent alerts
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