Method to prevent static destruction of an active element comprised in a liquid crystal display device

Abstract

A liquid crystal display device which utilizes an active matrix substrate and its substrate, and which is provided with a novel method of manufacture which can reduce the manufacturing process of amorphous silicon thin film transistors of reverse stagger construction, and an electrostatic protection means which is created using this method of manufacture. In a thin film transistor manufacturing process, along with forming an aperture for connecting the contact hole and the external terminal in a manufacturing process for a thin film transistor, utilization is made of ITO film as the wiring. The electrostatic protection means is formed from a bi-directional diode (electrostatic protection element) which is composed utilizing an MOS transistor connected between the electrode (PAD) for connecting the external terminal, and the joint electric potential line. The electrostatic protection element is substantially a transistor, with great current capacity, and utilizing the TFT formation process of pixel components in their existent state, the process can be formed without any complications.

1 . A method of preventing electrostatic destruction of active elements in an active matrix liquid crystal display device, the method comprising: 
 forming a pixel part including a thin film transistor connected to a scanning line and a signal line arranged in a matrix, and a pixel electrode connected to one end of the thin film transistor;    providing protective circuit to prevent electrostatic destruction, including a diode having a gate electrode layer in the thin film transistor connected to a source/drain electrode layer; and    connecting the protective device to prevent static electricity destruction between at least one of the scanning line, the signal line, a member electrically equivalent to at least one of said scanning line and the signal line, and a common electric potential line other than the scanning line and the signal line.    
   
   
       2 . The method of  claim 1 , the common electric potential line having a gate electrode material wiring, a source material wiring, and a pixel electrode material connected between the gate electrode material wiring and the source material wiring.