Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics

Abstract

In a magnetoresistive random access memory (MRAM), a magnetic tunnel junction (MTJ) ( 54 ) cell is stacked with an asymmetric tunnel device ( 56 ). This device, when used in a crosspoint MRAM array, improves the sensing of the state or resistance of the MTJ cells. Each MTJ cell has at least two ferromagnetic layers ( 42, 46 ) separated by an insulator ( 44 ). The asymmetric tunnel device ( 56 ) is electrically connected in series with the MTJ cell and is formed by at least two conductive layers ( 48, 52 ) separated by an insulator ( 50 ). The asymmetric tunnel device may be a MIM ( 56 ), MIMIM ( 80 ) or a MIIM ( 70 ). Asymmetry results from conducting electrons in a forward biased direction at a significantly greater rate than in a reversed biased direction. Materials chosen for the asymmetric tunnel device are selected to obtain an appropriate electron tunneling barrier shape to obtain the desired rectifying current/voltage characteristic.

1 - 10 . (canceled)  
     
     
         11 . A method of forming a non-volatile memory cell comprising: 
 providing a bit line;    providing a word line;    coupling one of the bit line or the word line to a magnetic tunnel junction (MTJ) storage element, the magnetic tunnel junction (MTJ) storage element having at least a first ferromagnetic layer, an insulating layer and a second ferromagnetic layer; and    coupling an asymmetric tunnel device to one of the word line or the bit line and in series with the MTJ storage element, the asymmetric tunnel device being asymmetric by conducting electrons in a forward biased direction at a significantly higher rate than in a reversed biased direction.    
     
     
         12 . The method of  claim 11  further comprising: 
 forming the asymmetric tunnel device by providing a first metal layer, providing an overlying insulating layer and providing an overlying second metal layer to form a metal-insulator-metal (MIM) device.    
     
     
         13 . The method of  claim 11  further comprising: 
 forming the asymmetric tunnel device by providing a first metal layer, providing an overlying first insulating layer, providing an overlying second metal layer, providing an overlying second insulating layer and providing an overlying third metal layer to form a metal-insulator-metal-insulator-metal (MIMIM) device.    
     
     
         14 . The method of  claim 11  further comprising: 
 forming the asymmetric tunnel device by providing a first metal layer, providing an overlying first insulating layer, providing an overlying second insulating layer, and providing an overlying second metal layer to form a metal-insulator-insulator-metal (MIIM) device.    
     
     
         15 . The method of  claim 11  further comprising: 
 forming the asymmetric tunnel device by forming a first layer, the first layer comprising tantalum, forming a second layer, the second layer comprising at least one of titanium oxide, strontium titanate, tantalum pentoxide and strontium bismuth tantalate (SrBi 2 Ta 2 O 9 ), and forming a third layer, the third layer comprising titanium nitride.    
     
     
         16 . The method of forming the non-volatile memory cell of  claim 11  further comprising: 
 forming a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells having a respective magnetic tunnel junction and asymmetric tunnel device, by first forming all layers of all the plurality of non-volatile memory cells' magnetic tunnel junctions and asymmetric tunnel devices prior to removing excess layer material between desired locations of the plurality of non-volatile memory cells using a single mask.    
     
     
         17 - 24 . (canceled)