Electronic circuit, method of driving the same, electronic device, electro-optical device, electronic apparatus, and method of driving the electronic device

Abstract

A gate of a driving transistor is set to a offset level corresponding to the threshold of the driving transistor by an initializing current flowing between a source and a drain of the driving transistor or a compensating transistor for the driving transistor. A conduction state of the driving transistor is set according to a gate voltage of the gate of the driving transistor that corresponds to a data signal and the threshold of the driving transistor. A current of which a level corresponds to the conduction state and of which the direction is opposite to the direction of the initializing current flows through driving transistor.

1 . A method of driving an electronic circuit, the method comprising: 
 a first step of generating a potential difference between a first terminal of a driving transistor and a second terminal of the driving transistor that has a channel region arranged between the first terminal and the second terminal; and    a second step of supplying a driven element with at least one of a driving voltage and a driving current according to a conduction state of the driving transistor, the conduction state being set by supplying the gate of the driving transistor with a data signal,    the first terminal functioning as a drain of the driving transistor in the first step,    a gate of the driving transistor and the first terminal of the driving transistor being electrically connected to each other in the first step, and    the second terminal functioning as the drain of the driving transistor in the second step.    
   
   
       2 . The method of driving an electronic circuit according to  claim 1 , 
 the gate voltage of the driving transistor being set to an offset level according to the threshold voltage of the driving transistor by an initializing current flowing between the first terminal and the second terminal, the initializing current being induced by the first step.    
   
   
       3 . The method of driving an electronic circuit according to  claim 1 , 
 the electronic circuit including a capacitor having a first electrode coupled with the gate of the driving transistor and a second electrode,    a capacitance being formed the first electrode and the second electrode, and    the conduction state being set by supplying the gate of the driving transistor with the data signal through a capacitive coupling via the capacitor, and    the capacitance coupling being carried out when the gate of the driving transistor is in a floating state.    
   
   
       4 . The method of driving an electronic circuit according to of  claim 1 , 
 the first terminal and the gate of the driving transistor being electrically disconnected from each other during at least a part of a period in which the second step is carried out.    
   
   
       5 . The method of driving an electronic circuit according to  claim 2 , 
 the driven element having an operating electrode coupled to the first terminal, a counter electrode, and a functional layer disposed between the operating electrode and the counter electrode, and    a voltage of at least the counter electrode being fixed to a predetermined voltage level during a period in which the first step and the second step is carried out.    
   
   
       6 . The method of driving an electronic circuit according to  claim 5 , 
 a voltage of the second terminal being set to be lower than the predetermined voltage level during at least a part of the period in which the first step being carried out.    
   
   
       7 . The method of driving an electronic circuit according to  claim 5 , further comprising: 
 a third step of setting a voltage level of the first terminal to a voltage level lower than the predetermined voltage level,    the voltage of the counter electrode being fixed to the predetermined voltage level during at least a part of a period in which the third step is performed.    
   
   
       8 . A method of driving an electronic circuit, the electronic circuit including a driving transistor that has a first terminal, a second terminal, and a channel region disposed between the first terminal and the second terminal, and a compensating transistor that has a third terminal, a fourth terminal, and a channel region disposed between the third terminal and the fourth terminal and whose a gate is coupled to the third terminal, the method comprising: 
 the method comprising:    a first step of generating a potential difference between the third terminal and the fourth terminal, such that the third terminal functions as a drain of the compensating transistor; and    a second step of supplying a driven element with at least one of a driving voltage and a driving current according to a conduction state of the driving transistor, the conduction state being set by supplying the gate of the driving transistor with a data signal,    a voltage level of the fourth terminal during at least a part of a period in which the second step is performed being set to be different from a voltage level of the fourth terminal during at least a part of a period in which the first is performed.    
   
   
       9 . The method of driving an electronic circuit according to  claim 8 , 
 the first step generating an initializing current that flows between the third terminal and the fourth terminal, and    the gate of the driving transistor being set to an offset level according to the threshold value of the compensating transistor after the initializing current flows between the third terminal and the fourth terminal.    
   
   
       10 . The method of driving an electronic circuit according to  claim 8 , 
 the third terminal and the fourth terminal being substantially electrically disconnected from each other during at least a part of a period in which the second step is performed.    
   
   
       11 . The method of driving an electronic circuit according to  claim 8 , 
 a voltage level of the first terminal being set to be higher than a voltage level of the second terminal during at least a part of the period in which the first step is performed, and    a voltage level of the second terminal being set to be higher than a voltage level of the first terminal during at least a part of a period in which the second step is performed.    
   
   
       12 . The method of driving an electronic circuit according to  claim 8 , 
 the driven element including an operating electrode coupled to the first terminal, a counter electrode, and a functional layer disposed between the operating electrode and the counter electrode, and    a voltage level of the counter electrode being fixed to a predetermined voltage level during at least a period in which the first step is performed.    
   
   
       13 . The method of driving an electronic circuit according to  claim 12 , 
 a voltage level of the second terminal being set to be lower than the predetermined voltage level during at least a part of a period in which the first step is performed    
   
   
       14 . The method of driving an electronic circuit according to  claim 12 , further comprising 
 a third step of setting a voltage level of the first terminal to a voltage level lower than the predetermined voltage level,    a voltage of the counter electrode being fixed to the predetermined voltage level during at least a part of a period in which the third step is performed.    
   
   
       15 . The method of driving an electronic circuit according to  claim 8 , 
 a voltage level of the fourth terminal being set at a equal to a voltage level of the second terminal in a first period in which the first step is performed and a second period in which the second step is performed.    
   
   
       16 . An electronic circuit that drives a driven element, the electronic circuit comprising: 
 a driving transistor having a first terminal, a second terminal and a channel region arranged between the first terminal and the second terminal;    a first capacitor having a first electrode and a second electrode, a capacitance being formed the first electrode and the second electrode; and    a first transistor disposed between the first terminal and a gate of the driving transistor to control the electrical connection between the first terminal and the gate of the driving transistor,    the first electrode being coupled to the gate of the driving transistor, and    the second electrode being coupled to the first terminal.    
   
   
       17 . The electronic circuit according to  claim 16 , further comprising: 
 a second capacitor having a third electrode and a fourth electrode with a capacitance formed the third electrode and the fourth electrode; and    a second transistor having a third terminal, a fourth terminal and a channel region arranged between the third terminal and the fourth terminal,    the gate of the driving transistor being coupled to the third electrode, and the third terminal being coupled to the fourth electrode.    
   
   
       18 . The electronic circuit according to  claim 16 , 
 at least one of a voltage level of the first terminal and a voltage level of the second terminal being set such that the first terminal functions as a drain of the driving transistor during at least a part of a first period in which the first terminal and the gate of the driving transistor are electrically connected via the first transistor, and    at least one of a voltage level of the first terminal and a voltage level of the second terminal being set such that the second terminal functions as a drain of the driving transistor during at least a part of a second period in which the first terminal and the gate of the driving transistor are electrically disconnected from each other,.    
   
   
       19 . An electronic circuit that drives a driven element, the electronic circuit comprising: 
 a driving transistor having a first terminal, a second terminal and a channel region arranged between the first terminal and the second terminal; and    a first transistor that is disposed between the first terminal and a gate of the driving transistor to control the electrical coupling between the first terminal and the gate of the driving transistor during at least a part of a first period in which the first terminal and the gate of the driving transistor are electrically connected to each other via the first transistor,    at least one of a voltage level of the first terminal and a voltage level of the second terminal being set such that the first terminal functions as a drain of the driving transistor, and    at least one of a voltage level of the first terminal and a voltage level of the second terminal being set such that the second terminal functions as a drain of the driving transistor during at least a part of a second period in which the first terminal and the gate of the driving transistor are electrically disconnected from each other.    
   
   
       20 . The electronic circuit according to  claim 19 , 
 the voltage level of the gate of the driving transistor is set to an offset voltage level according to the threshold voltage of the driving transistor after the first period, and    at least one of a driving voltage and a driving current according to a conduction state of the driving transistor being supplied to the driven element during at least a part of the second period.    
   
   
       21 . An electronic circuit that drives a driven element, the electronic circuit comprising: 
 a driving transistor having a first terminal, a second terminal and a channel region arranged between the first terminal and the second terminal; and    a compensating transistor a third terminal, a fourth terminal and a channel region arranged between the third terminal and the fourth terminal, the third terminal and a gate of the compensating transistor being coupled to each other,    any one of the third terminal and the fourth terminal being coupled to the gate of the driving transistor, and voltages of the third terminal and the fourth terminal being respectively settable to a plurality of voltage levels.    
   
   
       22 . The electronic circuit according to  claim 21 , 
 at least one of a voltage level of the third terminal and a voltage level of the fourth terminal being set such that the third terminal functions as a drain of the compensating transistor during at least a part of the first period,    at least one of a voltage level of the third terminal and a voltage level the fourth terminal being set such that the third terminal and the fourth terminal are electrically disconnected from each other during at least a part of the second period,    at least one of a driving voltage and a driving current according to a conduction state of the driving transistor being supplied to the driven element during at least a part of the second period, the conduction state being set according to a ,data signal, and    a voltage level of the fourth terminal during the first period being different from a voltage level of the fourth terminal during the second period.    
   
   
       23 . The electronic circuit according to  claim 22 , further comprising: 
 a capacitor having a first electrode and a second electrode with a capacitance formed the first electrode and the second electrode,    the first electrode being coupled to the gate of the driving transistor,    a voltage level of the gate of the driving transistor being set to an offset level according to the threshold voltage of the compensating transistor by an initializing current flowing between the third terminal and the fourth terminal of the compensating transistor, the initializing current being induced by the first step,    the conduction state of the driving transistor being set by a data voltage according to the data signal that is supplied to the gate of the driving transistor by a capacitive coupling via the capacitor when the gate of the driving transistor,    the capacitive coupling being carried out by supplying the data voltage to the second electrode, and    the voltage level of the driving transistor changing from the offset level to a level corresponding to the data voltage.    
   
   
       24 . The electronic circuit according to  claim 19 , 
 a voltage level of any one of the fourth terminal and the third terminal being set to the same voltage level as the voltage level of the second terminal during the first and second periods.    
   
   
       25 . An electronic device, comprising: 
 a plurality of electronic circuits as claimed in  claim 16;  and    driven elements provided for each of the plurality of electronic circuits.    
   
   
       26 . An electro-optical device, comprising: 
 a plurality of data lines;    a plurality of scanning lines;    a plurality of first power lines; and    a plurality of pixel circuits provided corresponding to intersections of the plurality of data lines and the plurality of scanning lines,    each of the plurality of pixel circuits including an electro-optical element, a driving transistor having a first terminal, a second terminal and a channel region arranged between the first terminal and the second terminal, a first switching transistor disposed between the first terminal and a gate of the driving transistor to control the electrical coupling between the first terminal and the gate,    a conduction state of the driving transistor being set according to a data signal which is supplied via one data line of the plurality of data lines,    at least one of a driving voltage and a driving current according to the conduction state of the driving transistor being supplied to the electro-optical element,    a voltage level of at least one of the first terminal and the second terminal being set such that the first terminal functions as a drain during at least a part of a period in which the first terminal and the gate of the driving transistor are electrically coupled to each other via the first switching transistor, and    a voltage level of at least one of the first terminal and the second terminal being set such that the second terminal functions as the drain during at least a part of a period in which at least one of the driving voltage and the driving current is supplied to the electro-optical element.    
   
   
       27 . The electro-optical device according to  claim 26 , 
 each of the plurality of pixel circuits further including a first capacitor having a first electrode and a second electrode with a capacitance formed between the first electrode and the second electrode, and a second switching transistor that controls the electrical connection between the one data line and the second electrode,    the gate of the driving transistor being coupled to the first electrode,    an initializing current flowing between the first terminal and the second terminal during at least a part of the period in which the first terminal functions as the drain of the driving transistor, and    the gate of the driving transistor being set to an offset level according to the threshold value of the driving transistor by the initializing current, and    the conduction state of the driving transistor being set by a capacitive coupling via the first capacitor,    the capacitive coupling being carried out by supplying a data voltage according to a data to the second electrode through the second switching transistor, and    the voltage level of the driving transistor changing from the offset level to a level corresponding to the data voltage by supplying the data voltage to the second electrode.    
   
   
       28 . The electro-optical device according to  claim 26 , 
 each of the plurality of pixel circuits further including a second capacitor having a third electrode and a fourth electrode with a capacitance formed the third electrode and the fourth electrode,    the third electrode being coupled to the gate of the driving transistor, and    the fourth electrode being coupled to the first terminal.    
   
   
       29 . The electro-optical device according to  claim 26 , 
 the second terminal being coupled to one power line of the plurality of power lines, and    the one power line being settable to a plurality of voltage levels.    
   
   
       30 . An electro-optical device, comprising: 
 a plurality of data lines;    a plurality of scanning lines;    a plurality of power lines; and    a plurality of pixel circuits provided corresponding to intersections of the plurality of data lines and the plurality of scanning lines,    each of the plurality of pixel circuits including an electro-optical element, a driving transistor having a first terminal, a second terminal and a channel region disposed between the first terminal and the second terminal, and a compensating transistor having a third terminal, a fourth terminal and a channel region disposed between the third terminal and the fourth terminal, the third terminal and a gate of the compensating transistor being coupled to each other,    a conduction state of the driving transistor being set according to a data signal supplied via one data line of the plurality of data lines,    one of the third terminal and the fourth terminal being coupled to one power line of the plurality of power lines,    at least one of a driving voltage and a driving current according to the conduction state of the driving transistor being supplied to the electro-optical element, and    the one power line being settable to a plurality of voltage levels.    
   
   
       31 . The electro-optical device according to  claim 30 , 
 a voltage level of the one power line being set to a first level during at least a part of a period in which the third terminal functions as a drain of the compensating transistor, and    the voltage level of the one power line being set to a second level during at least a part of a period in which at least one of the driving voltage and the driving current is supplied to the electro-optical element, and    the first level being different from the second level.    
   
   
       32 . The electro-optical device according to  claim 30 , 
 the voltage level of the gate of the driving transistor being set to an offset level according to the threshold voltage of the compensating transistor during at least a part of the period in which the third terminal functions as a drain of the compensating transistor.    
   
   
       33 . The electro-optical device according to  claim 32 , 
 the fourth terminal being coupled to the one data line, and    the first level being lower than the second level.    
   
   
       34 . The electro-optical device according to  claim 30 , 
 one of the first terminal and the second terminal being coupled to the one power line.    
   
   
       35 . The electro-optical device according to  claim 30 , 
 one of the first terminal and the second terminal being coupled to a power line of the plurality of power lines other than the one power line.    
   
   
       36 . The electro-optical device according to  claim 26 , 
 the plurality of power lines extending in a direction intersecting the plurality of data lines.    
   
   
       37 . The electro-optical device according to  claim 26 , 
 transistors included in each of the plurality of pixel circuits including only three transistors.    
   
   
       38 . An electronic apparatus comprising an electro-optical device as claimed in  claim 26 .  
   
   
       39 . A method of driving an electronic device, comprising: 
 setting a voltage of a node coupled to a gate of a driving transistor to an offset level according to the threshold value of the driving transistor by connecting electrically the gate and one of a source and a drain of the driving transistor to each other and applying a non-forward bias between the source and the drain;    writing data on the basis of the offset level in a capacitor coupled to the node by supplying a data line capacitively coupled to the node with a voltage from with a variable voltage source; and    generating a current according to data stored in the capacitor by applying a forward bias to the driving transistor and supplying a current detection circuit with the current.    
   
   
       40 . A method of driving an electronic device having a driving transistor that has a first terminal, a second terminal and a channel region arranged between the first terminal and the second terminal, the method, comprising: 
 setting a voltage level of the first terminal to be higher than a voltage level of the second terminal during at least a part of a period in which compensation of characteristics of a driving transistors is performed, and    setting a voltage level of the first terminal to be lower than a voltage level of the second terminal during at least a part of a period in which at least one of a driving voltage and a driving current according to a conduction state of the driving transistor is supplied to a driven element.    
   
   
       41 . The method of driving an electronic device according to  claim 40 , 
 in a state in which the first terminal and the gate of the driving transistor are coupled to each other, the compensation being performed.