US2005078256A1PendingUtilityA1

In plane switching mode liquid crystal display device and fabrication method thereof

Assignee: LG PHILIPS LCD CO LTDPriority: Oct 9, 2003Filed: Sep 27, 2004Published: Apr 14, 2005
Est. expiryOct 9, 2023(expired)· nominal 20-yr term from priority
Inventors:Hyung-Ki Hong
G02F 1/1343G02F 1/136227G02F 1/136222G02F 1/134363
43
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

An IPS mode LCD includes first and second substrates. A thin film transistor and a color filter layer are formed on the first substrate. A common electrode and a pixel electrode are arranged in a zigzag configuration on the first substrate. A liquid crystal layer is disposed between the first and second substrates.

Claims

exact text as granted — not AI-modified
1 . An in-plane switching (IPS) mode liquid crystal display (LCD) comprising: 
 a first substrate and a second substrate;    a thin film transistor and a color filter layer disposed on the first substrate;    a common electrode and a pixel electrode arranged in a zigzag configuration on the first substrate; and    a liquid crystal layer between the first and second substrates.    
     
     
         2 . The IPS mode LCD of  claim 1 , wherein the color filter layer is closer to the first substrate than the thin film transistor is to the first substrate.  
     
     
         3 . The IPS mode LCD of  claim 2 , further comprising an overcoat layer disposed on the color filter layer.  
     
     
         4 . The IPS mode LCD of  claim 1 , wherein the color filter layer is closer to the liquid crystal layer than the thin film transistor is to the liquid crystal layer.  
     
     
         5 . The IPS mode LCD of  claim 4 , further comprising an overcoat layer disposed on the color filter layer.  
     
     
         6 . The IPS mode LCD of  claim 1 , further comprising: 
 a gate line and a data line crossing with each other on the first substrate and defining a pixel region; and    a black matrix layer on the thin film transistor, the gate line and the data line.    
     
     
         7 . The IPS mode LCD of  claim 6 , wherein the thin film transistor is disposed at a crossing portion of the gate and data lines.  
     
     
         8 . The IPS mode LCD of  claim 6 , wherein the black matrix layer is formed of black resin.  
     
     
         9 . The IPS mode LCD of  claim 1 , further comprising a black matrix layer disposed on the first substrate.  
     
     
         10 . The IPS mode LCD of  claim 9 , wherein the black matrix layer and color filter layer are laterally adjacent to each other.  
     
     
         11 . The IPS mode LCD of  claim 9 , wherein the black matrix layer is closer to the liquid crystal layer than the color filter layer is to the liquid crystal layer.  
     
     
         12 . The IPS mode LCD of  claim 11 , wherein the thin film transistor is closer to the liquid crystal layer than the color filter layer is to the liquid crystal layer.  
     
     
         13 . The IPS mode LCD of  claim 12 , further comprising an overcoat layer that covers the black matrix layer.  
     
     
         14 . The IPS mode LCD of  claim 13 , wherein the overcoat layer is disposed in a pixel region laterally adjacent to the black matrix layer.  
     
     
         15 . The IPS mode LCD of  claim 13 , wherein the common and pixel electrodes are disposed on the overcoat layer.  
     
     
         16 . The IPS mode LCD of  claim 10 , further comprising an overcoat layer that covers the black matrix layer and color filter layer.  
     
     
         17 . The IPS mode LCD of  claim 16 , wherein the common and pixel electrodes are disposed on the overcoat layer.  
     
     
         18 . The IPS mode LCD of  claim 1 , wherein the common and pixel electrodes are disposed on the color filter layer.  
     
     
         19 . The IPS mode LCD of  claim 1 , wherein the common and pixel electrodes are disposed closer to the liquid crystal layer than the thin film transistor is to the liquid crystal layer.  
     
     
         20 . The IPS mode LCD of  claim 1 , further comprising alignment films disposed on the first and second substrates.  
     
     
         21 . The IPS mode LCD of  claim 1 , wherein the zigzag configuration has a bend angle less than  300  with respect to an alignment direction of the liquid crystal layer.  
     
     
         22 . The IPS mode LCD of  claim 1 , wherein the zigzag configuration has a bend angle range of 60-120°, except 90°, with respect to an alignment direction of the liquid crystal layer.  
     
     
         23 . The IPS mode LCD of  claim 1 , wherein the common and pixel electrodes are formed of a transparent conductive material.  
     
     
         24 . The IPS mode LCD of  claim 1 , wherein the common and pixel electrodes have a plurality of bends.  
     
     
         25 . A method of fabricating an IPS mode LCD, the method comprising: 
 forming a color filter layer and a thin film transistor on a first substrate;    forming a common electrode and a pixel electrode in a zigzag configuration after forming the thin film transistor; and    providing a liquid crystal layer between the first substrate and a second substrate facing the first substrate.    
     
     
         26 . The method of  claim 25 , wherein the color filter layer is closer to the first substrate than the thin film transistor is to the first substrate.  
     
     
         27 . The method of  claim 25 , wherein the color filter layer is closer to the liquid crystal layer than the thin film transistor is to the liquid crystal layer.  
     
     
         28 . The method of  claim 25 , further comprising forming a black matrix layer on the thin film transistor.  
     
     
         29 . The method of  claim 25 , further comprising forming a black matrix layer on the first substrate.  
     
     
         30 . The method of  claim 25 , wherein the zigzag configuration has a bend angle less than 30° with respect to an alignment direction of the liquid crystal layer.  
     
     
         31 . The method of  claim 25 , wherein the zigzag configuration has a bend angle range of 60-120°, except 90°, with respect to an alignment direction of the liquid crystal layer.  
     
     
         32 . An in-plane switching (IPS) mode liquid crystal display (LCD) comprising: 
 a first substrate and a second substrate;    a thin film transistor and a color filter layer disposed on the first substrate;    a liquid crystal layer between the first and second substrates; and    a common electrode and a pixel electrode arranged on the first substrate in a configuration that produces multiple domains in the liquid crystal layer when liquid crystal molecules in the liquid crystal layer are aligned.    
     
     
         33 . The IPS mode LCD of  claim 32 , wherein the common and pixel electrodes are arranged such that when the liquid crystal molecules are aligned, the liquid crystal molecules are symmetric.  
     
     
         34 . The IPS mode LCD of  claim 32 , wherein the common and pixel electrodes are non-linear.  
     
     
         35 . The IPS mode LCD of  claim 32 , further comprising a black matrix layer disposed on the first substrate and laterally adjacent to the color filter layer.  
     
     
         36 . The IPS mode LCD of  claim 32 , further comprising a black matrix layer disposed on the first substrate and closer to the liquid crystal layer than the color filter layer is to the liquid crystal layer.  
     
     
         37 . The IPS mode LCD of  claim 32 , wherein the thin film transistor is closer to the liquid crystal layer than the color filter layer is to the liquid crystal layer.  
     
     
         38 . The IPS mode LCD of  claim 32 , further comprising: 
 a black matrix layer disposed on the first substrate; and    an overcoat layer that covers the black matrix layer.    
     
     
         39 . The IPS mode LCD of  claim 38 , wherein the overcoat layer is disposed in a pixel region laterally adjacent to the black matrix layer.  
     
     
         40 . The IPS mode LCD of  claim 32 , wherein the common and pixel electrodes have a plurality of bends.

Join the waitlist — get patent alerts

Track US2005078256A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.