MIS semiconductor device and method of fabricating the same

Abstract

A MIS type semiconductor device comprises a semiconductor layer provided with a recess portion having a side wall with an obtuse angle at least at a portion of the recess portion, a gate electrode formed over a bottom surface of the recess portion, with a gate insulating film interposed, a source region and a drain region formed on sides of the gate electrode with an insulating film interposed, such that boundary planes between the source region and the drain region, on one hand, and the insulating film, on the other hand, are formed in the semiconductor layer at an angle to a surface of the semiconductor layer, and wiring portions for contact with the surface of the semiconductor layer. Wherein an edge of the gate electrode is located inside the recess portion provided in the semiconductor layer, and there is provided at least one of a mutually opposed portion between the gate electrode and the source region and a mutually opposed portion between the gate electrode and the drain region, whereby at least one of a portion of the source region and a portion of the drain region, which lie in the associated mutually opposed portions, functions as an accumulation layer.

1 - 11 . (canceled)  
   
   
       12 . A method of manufacturing a MIS type semiconductor device, the method comprising the steps of: 
 forming a recess portion having a side wall with an obtuse angle in a semiconductor layer by an RIE process;    forming a gate insulating film covering a surface of the semiconductor layer;    forming a conductive film on the gate insulating film including the recess portion; and    patterning the conductive film by a lithographic process such that the side wall is located at a side surface of the recess portion, thereby forming a gate electrode.    
   
   
       13 . A method of manufacturing a MIS type semiconductor device according to  claim 12 , wherein the side surface of the recess portion is inclined at about 45° with respect to the surface of the semiconductor layer.  
   
   
       14 - 18 . (canceled)  
   
   
       19 . A method of manufacturing a MIS type semiconductor device according to  claim 12 , further comprising: 
 forming a source region and a drain region in the semiconductor layer such that the source region and the drain region sandwich the gate electrode;    forming an interlayer insulating film on the semiconductor layer such that the interlayer insulating film covers the gate electrode, the source region and the drain region; and    selectively removing the interlayer insulating film by means of reactive ion etching, thereby forming a contact hole for contact between a wiring element and a surface of at least one or the source region and the drain region,    wherein said contact hole is formed in a self-alignment manner with respect to the gate electrode by using the insulting film protecting the side wall and the surface of the gate electrode as a mask.    
   
   
       20 . (canceled)