Method of forming silicon oxide layer and method of manufacturing thin film transistor thereby

Abstract

The present method of forming a silicon oxide layer comprises providing two frequency excitation plasma CVD device which comprises a high frequency electrode, a susceptor electrode, and two matching box for impedance matching between the electrodes and a power supply, wherein one side electrode constituting a tuning condenser of a matching box toward the high frequency electrode is the high frequency electrode; placing a substrate on the susceptor electrode; applying high frequency electric power on the high frequency electrode and the susceptor electrode respectively; and forming a silicon oxide layer on the substrate by generating plasma with using a reaction gas of which main reaction gas is a mixing gas of monosilane and nitrous oxide.

1 - 7 . (canceled)  
     
     
         8 . A method of manufacturing a thin film transistor using a chemical vapor deposition (CVD) apparatus having a frequency power supply, an electrode, and a gas inlet, the method comprising: 
 placing a substrate on the electrode of the CVD apparatus; and    applying electric power having a frequency from the frequency power supply to the electrode, while providing a reaction gas to the substrate via the gas inlet to form an insulator layer on the substrate, the reaction gas having a mixture gas of monosilane and nitrous oxide.    
     
     
         9 . The method of  claim 8 , wherein the reaction gas includes a mixture gas of monosilane and nitrous oxide having a flow ratio of between 10% and 50%.  
     
     
         10 . The method of  claim 8 , wherein a ratio of nitrous oxide to monosilane is at least 10.  
     
     
         11 . The method of  claim 8 , wherein the reaction gas includes gas selected from helium, hydrogen, xenon, oxygen, argon, nitrogen and a mixture thereof.  
     
     
         12 . The method of  claim 8 , wherein the insulator layer includes a gate insulator.  
     
     
         13 . The method of  claim 8 , wherein the insulator layer includes an interspacing insulator.  
     
     
         14 . The method of  claim 8 , wherein the insulator layer includes a silicon oxide layer.  
     
     
         15 . The method of  claim 8 , wherein the frequency is between 13.56 MHz and 100 MHz.  
     
     
         16 . The method of  claim 8 , wherein the frequency is about 40.68 MHz.  
     
     
         17 . The method of  claim 8 , wherein the frequency is about 27.12 MHZ.