Focal plane processor for IR detection

Abstract

A focal plane array detector in a sensor for IR imaging. Pixel readout and analog to digital conversion is performed in an integrated circuit which includes the imaging array. The charge of each pixel is accumulated in a capacitor and a digital to analog charge converter cancels this charge. A controller controls this charge converter providing the appropriate amount of charge. An analog to digital converter incorporating a comparator switches the controller on/off. In some embodiment a programmable device external to the sensor participates in the control of the analog to digital converter. In a typical embodiment of the invention a cycle generator controls the charge output of the digital to analog converter. In a preferred embodiment the analog to digital converters are grouped wherein all such converters group operate simultaneously.

1 . A focal plane array containing rows and columns of pixels for IR imaging, wherein pixel readout and analog to digital conversion is performed in an integrated circuit inclusive of said array, comprising: 
 at least one capacitor per pixel, for accumulating the charge of a detector element.    at least one analog to digital converter (ADC) incorporating a comparator for on/off switching a digital controller, wherein said controller controls a digital to analog charge converter for providing an appropriate amount of charge to cancel out the charge of one pixel at a time by one ADC, and    switching elements for connecting said pixels to said ADCs.    
   
   
       2 . A focal plane array for IR imaging as in  claim 1  comprising a cycle generator, for controlling a charge output of a digital to analog converter to cancel out said charge of said pixel.  
   
   
       3 . A focal plane array for IR imaging as in  claim 2  wherein said cycle generator is a ramp generator connected through a capacitor to the input port of said at least one ADC and to a column line.  
   
   
       4 . A focal plane array for IR imaging as in  claim 3  wherein said ramp generator produces at least one linear ramp.  
   
   
       5 . A focal plane array for IR imaging as in  claim 1  wherein said comparator includes an integrator as an input stage.  
   
   
       6 . A focal plane array for IR imaging as in  claim 1  and wherein said focal plane array is cooled.  
   
   
       7 . A focal plane array for IR imaging as in  claim 1  wherein said ADCs are allocated in groups, wherein all ADCs of one group operate simultaneously.  
   
   
       8 . A focal plane array for IR imaging as in  claim 7  each of said groups contain at least two ADCs per each column.  
   
   
       9 . A focal plane array for IR imaging as in  claim 7  and wherein one multi ramp generator serves at least one group of ADCs.  
   
   
       10 . A focal plane array for IR imaging as in  claim 7  and wherein one counter serves at least one group of ADC's.  
   
   
       11 . An IR imaging system as in  claim 1  and wherein an external programmable logic device connected via a communication channel participates at least in the control of said ADC.  
   
   
       12 . An IR imaging system as in  claim 11  wherein said external programmable device also contains a buffer, for providing a interface between the pixels' readout stream and the timing parameters and communications protocols of a user.  
   
   
       13 . A method for digitally quantifying IR radiation impinging on a focal plane array, wherein pixels readout and analog to digital conversion is performed in an integrated circuit inclusive of said array, employing at least one circuit for each column of said array, and wherein a charge on each of said pixels is converted to a digital number, comprising the steps of: 
 on/off switching by a comparator of a digital controller controlling a digital to analog charge converter for supplying a charge by a digital to analog converter in an appropriate quantity to cancel out said charge of said pixel, and    generating a dual ramp conversion cycle for a substantially two step analog to digital conversion of said charge and providing a most significant count in a first step and a least significant count of said charge in a second step.    
   
   
       14 . A method for digitally quantifying IR radiation impinging on a focal plane array as in  claim 13  wherein an analog to digital conversion of the charge in every pixel is done on the focal plane in two quantification steps, a first step providing the most significant bits and a second step the least significant bits of said quantification.  
   
   
       15 . A method for digitally quantifying IR radiation impinging on a focal plane array as in  claim 14  and wherein the combination of the most significant bits and the least significant bits into one digital number is done partially externally, outside said focal plane array.  
   
   
       16 . A method for digitally quantifying IR radiation impinging on a focal plane array as in  claim 13  and wherein a cycle is generated for controlling the charge output of a digital to analog converter to cancel out said charge of said pixel.  
   
   
       17 . A method for digitally quantifying IR radiation impinging on a focal plane array as in  claim 16  and wherein a cycle generated contains at least one ramp .  
   
   
       18 . A method for digitally quantifying IR radiation impinging on a focal plane array as in  claim 13 , and wherein a tradeoff between the resolution of said quantification and the frame rate is enabled by programming said dual ramp conversion cycle.  
   
   
       19 . A method for digitally quantifying IR radiation impinging on a focal plane array as in  claim 13  and wherein said charge of said pixel is loaded first into a capacitor of an integrator wherein said integrator is connected to a column of said array, and wherein said charge is later digitally quantified.  
   
   
       20 . A method for digitally quantifying IR radiation impinging on a focal plane array as in  claim 13 , and wherein the pixels of said array are grouped, such that quantification is performed simultaneously for all members of said group, each group at a time, allocating at one conversion time one ADC to each member of each group.  
   
   
       21 . A method for digitally quantifying IR radiation impinging on a focal plane array as in  claim 20 , and wherein for said each group of pixels, one common ramp generator produces at least one linear voltage ramp whereby in each ADC a low level DC current is created by said ramp driving a capacitor connected to a virtual ground of an integrator.  
   
   
       22 . A method for digitally quantifying IR radiation impinging on a focal plane array as in  claim 20 , and wherein each of said groups contain two rows of said array.