Via and metal line interface capable of reducing the incidence of electro-migration induced voids

Abstract

Embodiments of the invention include a method for forming copper interconnect structure. The method involves providing a substrate having a copper conductive layer formed thereon. An insulating layer having openings is formed on the conductive layer so that the openings expose portions of the underlying conductive layer at the bottom of the openings. A barrier layer is formed on the surface of the substrate. A portion of the barrier layer is removed at the bottom of the opening to expose the underlying conductive layer. A copper plug is formed in the opening such that the bottom of the plug is in contact with the exposed conductive layer. The substrate can be subjected to further processing if desired. The invention also includes a copper interconnect structure having increased resistance to electromigration.

1 - 18 . (Canceled).  
     
     
         19 . A copper interconnect structure having increased resistance to electromigration, the interconnect comprising: 
 a semiconductor substrate;    a conductive layer formed of copper-containing material formed on the substrate;    an insulating layer formed on the at least one conductive layer, the insulating layer having an opening that exposes a portion of the underlying conductive layer at the bottom of the opening the opening also including sidewalls;    a barrier layer formed on the sidewall of the opening, the barrier layer being formed of a material that is resistant to copper diffusion into the insulating layer; and    a conductive plug comprised of copper-containing material is formed in the opening such that the bottom of the plug is in contact with the underlying exposed conductive layer.    
     
     
         20 . The copper interconnect of  claim 19  wherein the insulating layer is formed of low-K dielectric.  
     
     
         21 . The barrier layer of  claim 19  wherein the metal barrier layer is formed of material including at least one of tantalum, tantalum nitride, titanium, titanium nitride, palladium, chromium, tantalum, magnesium, and molybdenum.  
     
     
         22 . A semiconductor integrated circuit incorporating the structure of  claim 19.