Nonvolatile semiconductor memory device and its manufacturing method

Abstract

Memory cells each having a floating gate ( 4 ), control gate ( 6 ), and source and drain diffusion layers ( 7 a, 7 b ) are formed on a silicon substrate ( 1 ). A silicon nitride film ( 10 ) by low-pressure CVD is maintained as side wall insulating films on side walls of the gates in each memory cell. A silicon nitride film ( 11 ) by plasma CVD is formed to cover a memory cell array, and silicon oxide films ( 12 a, 12 b ) are made on the silicon nitride film ( 11 ) to form an inter-layer insulating film. A common source line ( 13 ) connected to the source diffusion layer 7 a is formed to embed in the silicon oxide film ( 12 a ), and a bit line ( 14 ) connected to the drain diffusion layer ( 7 b ) is formed on the silicon oxide film ( 12 b ).

1 - 7 . (canceled)  
   
   
       8 . A method for manufacturing a nonvolatile semiconductor memory device comprising: 
 a first step of forming in a semiconductor substrate memory transistors for performing nonvolatile storage of an electric charge in accordance with data;    a second step of depositing a first silicon nitride film by low-pressure CVD to cover said memory transistors and selectively maintaining said first silicon nitride film as protective side walls on side walls of gates of each said memory transistor;    a third step of stacking a second silicon nitride film to cover a surface of gate, a surface of a source diffusion layer, a surface of a drain diffusion layer and said protective side walls of said memory transistor; and    a fourth step of forming a wiring layer above said second silicon nitride film via an inter-layer insulating film including a silicon oxide film as its major component.    
   
   
       9 . The method for manufacturing a nonvolatile semiconductor memory device according to  claim 8  wherein, in said third step, said second silicon nitride film is deposited by plasma CVD.  
   
   
       10 . The method for manufacturing a nonvolatile semiconductor memory device according to  claim 8  wherein, in said third step, said second silicon nitride film is deposited by low-pressure CVD.  
   
   
       11 . The method for manufacturing a nonvolatile semiconductor memory device according to  claim 8  wherein, after selectively maintaining said first silicon nitride film as said protective side walls on said side walls of gates in said second step and before depositing said second silicon nitride film in said third step, a metal silicide film deposition step is interposed for selectively making a metal silicide film on said surfaces of a gate, said surface of the source diffusion layer, and said surface of the drain diffusion layer.  
   
   
       12 . The method for manufacturing a nonvolatile semiconductor memory device according to  claim 11  wherein an oxide film covering step for covering exposed surfaces of said semiconductor substrate and said memory transistors is interposed between said first step and said second step, and in said metal silicide film deposition step, by etching said oxide film, said surfaces of the gate, said surface of the source diffusion layer and said surface of the drain diffusion layer are exposed, and thereafter said metal silicide film is formed.  
   
   
       13 . The method for manufacturing a nonvolatile semiconductor memory device according to  claim 12  wherein said oxide film covering step includes two steps, one of which is an oxidation step by secondary oxidation and the other of which is an oxidation step by CVD.  
   
   
       14 . The method for manufacturing a nonvolatile semiconductor memory device according to  claim 11  wherein said metal silicide film is a titanium silicide film.  
   
   
       15 . The method for manufacturing a nonvolatile semiconductor memory device according to  claim 11  wherein said second to fourth steps are common to a manufacturing step of at least one of a low-voltage MOS transistor and a high-voltage MOS transistor as a peripheral circuit.