Multiple mask step and scan aligner

Abstract

A new optical lithographic exposure apparatus is described. The apparatus may comprise, for example, a lithographic stepper or scanner. A wafer stage comprises a means of supporting a semiconductor wafer. A mask stage comprises a means of holding a first mask and a second mask and maintaining a fixed relative position between the first mask and the second mask. The mask stage may further comprise an independent means of aligning each mask. A light source comprises a means to selectively shine actinic light through one of the first mask and the second mask. An imaging lens is capable of focusing the actinic light onto the semiconductor wafer. A step and scan method using the mask stage is provided. A first mask and a second mask are loaded into a mask stage of an optical lithographic exposure apparatus. The first mask and the second mask are aligned. The first mask is scanned. The wafer is then stepped. The second mask is scanned. By repeating this sequence across the wafer twice, the patterns of the first mask and the second mask are thereby superimposed in every field. The photoresist layer is developed to thereby create the patterning in the manufacture of the integrated circuit device.

1 - 27 . (Canceled).  
   
   
       28 . A method of arranging masks, comprising: 
 holding a first mask and a second mask; and    maintaining a fixed relative position between the first mask and the second mask.    
   
   
       29 . The method as claimed in  claim 28 , wherein the first mask and the second mask are placed side by side.  
   
   
       30 . The method as claimed in  claim 28 , wherein the first mask and the second mask are placed side by side in a same direction as a scanning direction.  
   
   
       31 . The method as claimed in  claim 28 , wherein the first mask and the second mask are configured across a scanning direction.  
   
   
       32 . The method as claimed in  claim 28 , wherein the first mask and the second mask are held in a separate fixture of a mask stage.  
   
   
       33 . The method as claimed in  claim 28 , wherein the first mask comprises a phase-shifting mask.  
   
   
       34 . The method as claimed in  claim 28 , wherein the second mask comprises a binary intensity mask.  
   
   
       35 . A method for patterning a photoresist layer, comprising: 
 depositing a photoresist layer overlying a wafer;    exposing the photoresist layer with a plurality of masks held in a mask stage, wherein the mask stage maintains a fixed relative position between each two adjacent masks; and    developing the photoresist layer.    
   
   
       36 . The method as claimed in  claim 35 , wherein the steps of exposing the photoresist layer with the plurality of masks held in a mask stage comprise: 
 loading the mask stage holding the plurality of masks;    aligning the plurality of masks; and    scanning the plurality of masks and stepping the wafer to expose the photoresist layer with each of the plurality of masks respectively.    
   
   
       37 . The method as claimed in  claim 36 , wherein the plurality of masks are aligned prior to any exposing and stepping.  
   
   
       38 . The method as claimed in  claim 35 , wherein the plurality of masks are placed side by side in a same direction as a scanning direction.  
   
   
       39 . The method as claimed in  claim 35 , wherein the plurality of masks are placed side by side and configured across a scanning direction.  
   
   
       40 . The method as claimed in  claim 35 , wherein the plurality of masks are held in a separate fixture of a mask stage.  
   
   
       41 . The method as claimed in  claim 35 , wherein the first mask and the second mask are held in a separate fixture of a mask stage.  
   
   
       42 . A method for patterning a photoresist layer, comprising: 
 depositing a photoresist layer overlying a wafer comprising a plurality of fields;    exposing the photoresist layer with a first mask and a second mask both held in a mask stage, wherein the mask stage maintains a fixed relative position between the first mask and the second mask; and    developing the photoresist layer.    
   
   
       43 . The method as claimed in  claim 42 , wherein the steps of exposing the photoresist layer with the first mask and the second mask held in a mask stage comprise: 
 loading the mask stage holding the first mask and the second mask;    aligning the first mask and the second mask; and    scanning the first mask and stepping the wafer to expose each of fields; and    scanning the second mask and stepping the wafer to expose each of fields.    
   
   
       44 . The method as claimed in  claim 43 , wherein the first mask and the second mask are placed side by side in a same direction as a scanning direction.  
   
   
       45 . The method as claimed in  claim 43 , wherein the first mask and the second mask are placed side by side and configured across a scanning direction.  
   
   
       46 . The method as claimed in  claim 43 , wherein first mask comprises a phase-shifting mask and wherein the second mask comprises a binary intensity mask.  
   
   
       47 . The method as claimed in  claim 43 , wherein the first mask and the second mask are held in a separate fixture of the mask stage.  
   
   
       48 . The method as claimed in  claim 42 , wherein the steps of exposing the photoresist layer with the first mask and the second mask held in a mask stage comprise: 
 loading the mask stage holding the first mask and the second mask;    aligning the first mask and the second mask; and    scanning the first mask to expose a first field;    scanning the second mask to expose a second field adjacent to the first field;    stepping the wafer and repeating the scanning steps until each of fields is exposed with the first mask and the second mask.    
   
   
       49 . The method as claimed in  claim 48 , wherein the first mask and the second mask are placed side by side in a same direction as a scanning direction.  
   
   
       50 . The method as claimed in  claim 48 , wherein the first mask and the second mask are placed side by side and configured across a scanning direction.  
   
   
       51 . The method as claimed in  claim 48 , wherein first mask comprises a phase-shifting mask and wherein the second mask comprises a binary intensity mask.  
   
   
       52 . The method as claimed in  claim 48 , wherein the first mask and the second mask are held in a separate fixture of the mask stage.  
   
   
       53 . A method for fabricating an integrated circuit device, comprising: 
 depositing a photoresist layer overlying a substrate;    exposing the photoresist layer with a first mask and a second mask both held in a mask stage, wherein the mask stage maintains a fixed relative position between the first mask and the second mask;    developing the photoresist layer to form a photoresist pattern; and    patterning the substrate with the photoresist pattern.    
   
   
       54 . The method as claimed in  claim 53 , wherein the first mask and the second mask are placed side by side.  
   
   
       55 . The method as claimed in  claim 53 , wherein the first mask and the second mask are placed side by side in a same direction as a scanning direction.  
   
   
       56 . The method as claimed in  claim 53 , wherein the first mask and the second mask are configured across a scanning direction.  
   
   
       57 . The method as claimed in  claim 53 , wherein the first mask and the second mask are held in a separate fixture of a mask stage.  
   
   
       58 . The method as claimed in  claim 53 , wherein the first mask comprises a phase-shifting mask.  
   
   
       59 . The method as claimed in  claim 53 , wherein the second mask comprises a binary intensity mask.