Semiconductor device having epitaxially-filled trench and method for manufacturing semiconductor device having epitaxially-filled trench

Abstract

A semiconductor device includes a semiconductor substrate and a semiconductor layer. The semiconductor substrate has a main surface that is an Si{100} surface. The substrate has a trench in the main surface. The semiconductor layer is located on surfaces defining the trench to have common crystallographic planes with the semiconductor substrate. The trench is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other. The bottom surface and the long sidewall surfaces are Si{100} surfaces.

1 . A method for manufacturing a semiconductor device, the method comprising: 
 preparing a semiconductor substrate, which has a main surface that is an Si{100} surface;    forming a first trench, which is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, in the main surface such that the long sidewall surfaces are Si{100} surfaces; and    forming a semiconductor layer on the sidewalls and the bottom surfaces of the trench by epitaxial growth.    
   
   
       2 . A method for manufacturing a semiconductor device, the method comprising: 
 preparing a semiconductor substrate, which has a main surface that is an Si{100} surface and which is first conductivity type to form a source region;    forming a first trench, which is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, in the main surface such that the bottom surface and the long sidewall surfaces are Si{100} surfaces;    forming a base-region-forming film, which is used for forming a second conductivity type base region, by epitaxial growth to cover the sidewall surfaces and the bottom surface without completely filling the first trench;    forming a drift-region-forming film, which is used for forming a first conductivity type drift region, to cover the base-region-forming film without completely filling the first trench;    forming a drain-region-forming film, which is used for forming a first conductivity type drain region, to cover the drift-region-forming film;    planarizing the base-region-forming film, the drift-region-forming film, and the drain-region-forming film to form the base region, the drift region, and the drain region;    forming a second trench to intersect the base region from the source region in a direction parallel to the main surface and to extend orthogonally from the main surface;    forming a gate insulating film in the second trench; and    forming a gate electrode on the gate insulating film.    
   
   
       3 . A method for manufacturing a semiconductor device, the method comprising: 
 preparing a semiconductor substrate, which has a main surface that is an Si{100} surface and which is first conductivity type to form a drain region;    forming a first trench, which is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, in the main surface such that the bottom surface and the long sidewall surfaces are Si{100} surfaces;    forming a drift-region-forming film, which is used for forming a first conductivity type drift region, by epitaxial growth to cover the sidewall surfaces and the bottom surface without completely filling the first trench;    forming a base-region-forming film, which is used for forming a second conductivity type base region, to cover the drift-region-forming film without completely filling the first trench;    forming a source-region-forming film, which is used for forming a first conductivity type source region, to cover the base-region-forming film;    planarizing the drift-region-forming film, the base-region-forming film, and the source-region-forming film to form the drift region, the base region, and the source region;    forming a second trench to intersect the base region from the source region in a direction parallel to the main surface and to extend orthogonally from the main surface;    forming a gate insulating film in the second trench; and    forming a gate electrode on the gate insulating film.    
   
   
       4 . The method according to  claim 2  further comprising: 
 forming a third trench, which is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, in the drift region such that the long sidewall surfaces extend orthogonally from the main surface to be Si{100} surfaces; and forming a second conductivity type RESURF layer in the third trench by epitaxial growth.    
   
   
       5 . The method according to  claim 3  further comprising: 
 forming a third trench, which is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, in the drift region such that the long sidewall surfaces extend orthogonally from the main surface to be Si{100} surfaces; and    forming a second conductivity type RESURF layer in the third trench by epitaxial growth.    
   
   
       6 . A method for manufacturing a semiconductor device, the method comprising: 
 preparing a semiconductor substrate, which has a main surface that is an Si{100} surface;    forming one layer out of a first conductivity type layer and a second conductivity type layer on the semiconductor substrate;    forming first trenches, each of which is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, in a surface of the one layer such that the bottom surfaces and the long sidewall surfaces are Si{100} surfaces;    forming the other layer out of the first conductivity type layer and the second conductivity type layer to fill the first trenches by epitaxial growth;    forming a p/n column layer, which includes first conductivity type drift regions and second conductivity type first semiconductor regions in a stripe pattern layout;    forming a second conductivity type second semiconductor layer on the drift regions and the first semiconductor regions;    forming second trenches, which extend through the second semiconductor layer; and    forming gate electrodes on surfaces defining the second trenches with gate insulating films therebetween.    
   
   
       7 . The method according to  claim 2 , wherein the second trenches are formed such that surfaces defining the second trenches become Si{100} surfaces.  
   
   
       8 . The method according to  claim 3 , wherein the second trenches are formed such that surfaces defining the second trenches become Si{100} surfaces.  
   
   
       9 . The method according to  claim 6 , wherein the second trenches are formed such that surfaces defining the second trenches become Si{100} surfaces.  
   
   
       10 . The method according to  claim 1 , wherein the first trench is formed such that the sidewall surface thereof become Si {100} surfaces.  
   
   
       11 . The method according to  claim 1 , wherein the semiconductor substrate is a semiconductor wafer that has an indexing cut-out that is an Si{100} surface and wherein the first trench is formed such that the long sidewall surfaces are parallel or orthogonal to the indexing cut-out.  
   
   
       12 . The method according to  claim 1 , wherein the semiconductor substrate is a semiconductor wafer that has an indexing cut-out that is an Si{110} surface and wherein the first trench is formed such that the long sidewall surfaces are at an angle of 45 degrees with the indexing cut-out.  
   
   
       13 . The method according to  claim 1 , wherein the first trench is formed by dry etching.  
   
   
       14 . A semiconductor device comprising: 
 a semiconductor substrate, which has a main surface that is an Si{100} surface, wherein the substrate has a trench in the main surface; and    a semiconductor layer, which is located on surfaces defining the trench to have common crystallographic planes with the semiconductor substrate, wherein the trench is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other and wherein the bottom surface and the long sidewall surfaces are Si{100} surfaces.    
   
   
       15 . A semiconductor device comprising: 
 a semiconductor substrate, which has a main surface that is an Si{100} surface; and    a semiconductor layer, which is located in the main surface, wherein the semiconductor layer has a bottom surface and two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, wherein the quotient obtained by dividing a width of the sidewall surfaces by that of bottom surface is 1 or more, and wherein the bottom surface and the long sidewall surfaces are Si{100} surfaces.    
   
   
       16 . A semiconductor device comprising: 
 a semiconductor substrate, which has a main surface that is an Si{100} surface and which is first conductivity type to form a source region;    a second conductivity type base region, which extends orthogonally from the main surface to have a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, wherein the bottom surface and the long sidewall surfaces are Si{100} surfaces;    a first conductivity type drift region, which extends orthogonally from the main surface in the base region and has a lower impurity concentration than the semiconductor substrate;    a drain region, which extends orthogonally from the main surface in the drift region to be separated from the base region;    a trench, which extends orthogonally from the main surface and intersects the base region from the source region to reach the drift region in a direction parallel to the main surface and to expose an Si{100} surface in the base region;    a gate insulating film, which is located on surfaces defining the trench; and    a gate electrode, which is located on the gate insulating film.    
   
   
       17 . A semiconductor device comprising: 
 a semiconductor substrate, which has a main surface that is an Si{100} surface and which is first conductivity type to form a drain region;    a first conductivity type drift region, which extends orthogonally from the main surface to have a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, wherein the bottom surface and the long sidewall surfaces are Si{100} surfaces and wherein the drift region has a lower impurity concentration than the semiconductor substrate;    a second conductivity type base region, which extends orthogonally from the main surface in the drift region;    a first conductivity type source region, which extends orthogonally from the main surface in the base region;    a trench, which extends orthogonally from the main surface and intersects the base region from the source region in a direction parallel to the main surface to expose an Si{100} surface in the base region;    a gate insulating film, which is located on surfaces defining the trench; and    a gate electrode, which is located on the gate insulating film.    
   
   
       18 . The semiconductor device according to  claim 16  further comprising a second conductivity type RESURF layer, which extends orthogonally from the main surface in the drift region to have a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, wherein the bottom surface and the long sidewall surfaces are Si{100} surfaces.  
   
   
       19 . The semiconductor device according to  claim 17  further comprising a second conductivity type RESURF layer, which extends orthogonally from the main surface in the drift region to have a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, wherein the bottom surface and the long sidewall surfaces are Si{100} surfaces.  
   
   
       20 . A semiconductor device comprising: 
 a semiconductor substrate, which has a main surface that is an Si{100} surface;    a p/n column layer, which is made of first conductivity type drift regions and second conductivity type first semiconductor regions in a stripe pattern layout, wherein the p/n column layer is located on the semiconductor substrate;    second conductivity type second semiconductor regions, which are located on the p/n column layer, wherein the semiconductor device has trenches, which intersect the second semiconductor regions, and wherein surfaces defining the trenches are Si{100} surfaces;    gate insulating films, which are located on the surfaces defining the trenches; and    gate electrodes, which are located on the gate insulating films, wherein out of interfacial surfaces between the drift regions and the first semiconductor regions, the long interfacial surfaces are Si{100} surfaces.    
   
   
       21 . A method for manufacturing a semiconductor device, the method comprising: 
 preparing a semiconductor substrate, which has a main surface that is an Si{110} surface;    forming one layer out of a first conductivity type layer and a second conductivity type layer on the semiconductor substrate;    forming first trenches, each of which is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, in a surface of the one layer by anisotropic wet etching such that the bottom surfaces are Si{110} surfaces and the long sidewall surfaces are Si{111} surfaces;    forming the other layer out of the first conductivity type layer and the second conductivity type layer to fill the first trenches by epitaxial growth;    forming a p/n column layer, which includes first conductivity type drift regions and second conductivity type first semiconductor regions in a stripe pattern layout;    forming a second conductivity type second semiconductor layer on the drift regions and the first semiconductor regions;    forming second trenches, each of which is defined by a bottom surface, two long sidewall surfaces that face each other, and two short sidewall surfaces that face each other, in the second semiconductor layer by dry etching such that the long sidewall surfaces are Si{100} surfaces;    forming gate oxide films on surfaces defining the second trenches by thermal oxidization; and forming gate electrodes on the gate insulating films.    
   
   
       22 . The method according to  claim 21 , wherein the first trenches are formed such that the sidewall surfaces of the first trenches become Si{111} surfaces.  
   
   
       23 . The method according to  claim 21 , wherein the second trenches are formed such that the second trenches are rectangular when viewed from above their entrance, the bottom surfaces are Si{110} surfaces, the two long sidewall surfaces are Si{100} surfaces, and the two short sidewall surfaces are Si{111} surfaces.  
   
   
       24 . The method according to  claim 21 , wherein the semiconductor substrate is a semiconductor wafer that has an indexing cut-out that is an Si{111} surface, wherein the first trenches are formed such that the long sidewall surfaces of the first trenches are parallel to the indexing cut-out, and wherein the second trenches are formed such that the long sidewall surfaces of the second trenches are at an angle of 54.7 degrees or 125.2 degrees with the indexing cut-out.  
   
   
       25 . The method according to  claim 21 , wherein the semiconductor substrate is a semiconductor wafer that has an indexing cut-out that is an Si{112} surface, wherein the first trenches are formed such that the long sidewall surfaces of the first trenches are orthogonal to the indexing cut-out, and wherein the second trenches are formed such that the long sidewall surfaces of the second trenches are at an angle of 144.7 degrees or 35.2 degrees with the indexing cut-out.  
   
   
       26 . The method according to  claim 21 , wherein the semiconductor substrate is a semiconductor wafer that has an indexing cut-out that is an Si{100} surface, wherein the first trenches are formed such that the long sidewall surfaces of the first trenches are at an angle of 125.3 degrees or 54.8 degrees with the indexing cut-out, and wherein the second trenches are formed such that the long sidewall surfaces of the second trenches are parallel to the indexing cut-out.  
   
   
       27 . The method according to  claim 21 , wherein the semiconductor substrate is a semiconductor wafer that has an indexing cut-out that is an Si{110} surface, wherein the first trenches are formed such that the long sidewall surfaces of the first trenches are at an angle of 35.3 degrees or 144.8 degrees, with the indexing cut-out, and wherein the second trenches are formed such that the long sidewall surfaces of the second trenches are orthogonal to the indexing cut-out.