US2005041836A1PendingUtilityA1
Information media using information of defect in an article
Est. expiryDec 14, 2018(expired)· nominal 20-yr term from priority
H10W 90/754H10W 90/724H10W 74/00H10W 72/5363H10W 72/951H10W 72/551H10W 72/536H10W 72/075H10W 46/603H10W 46/403H10W 46/201H10W 46/106H10W 46/00G06K 19/06037G06K 7/10544G06K 19/073G06K 19/07372G06K 19/14
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Claims
Abstract
A semiconductor substrate has a peculiar crystal defect. Crystal defects in a fixed area of a substrate can be treated as data acquired by coding the distribution of the crystal defects. The coded data is utilized for certificate data of an IC card by identifying a semiconductor substrate itself.
Claims
exact text as granted — not AI-modified1 - 24 . (Canceled)
25 . A method for identifying an article including the steps of:
mounting a semiconductor chip in which a plurality of electronics devices are formed; detecting binary data based on the electric characteristics of said devices according to one or a plurality of thresholds of the predetermined area groups of said devices of said chip; recording the pattern as an ID code of said article, which is lined up said detected data with the predetermined order; detecting binary data based on the electric characteristics of said devices according to one or a plurality of thresholds of the predetermined area groups of said devices of said chip mounted in an objective article; transferring the detected binary data of said chip mounted in said objective article to an ID code according to a pattern which is lined up with said detected data with the predetermined order; comparing said ID code with ID codes recorded; and determining that said objective article corresponds to an article which has the same ID code recorded, on condition that said ID code is the same ID code with a recorded ID code.
26 . An IC card that mounts a semiconductor chip in which a plurality of electronic devices are formed, wherein:
said semiconductor chip comprises: an electric voltage circuit which applies the predetermined electric voltage to said plurality of electronic devices; an AD converter which converts an electric characteristics of each of said electronic devices under said applied electric voltage to a digital signal according to the predetermined threshold value; and a coding circuit which codes the pattern as an ID code of said IC card, which is lined up with said electric characteristics of each of said electronic devices with the predetermined order.
27 . An IC card according to claim 26 , wherein, said AD converter converts an electric characteristics of each of said electronic devices under said applied electric voltage to binary data according to a plurality of thresholds.
28 . An IC card according to claim 26 , wherein, said electric voltage circuit applies a plurality of predetermined electric voltages to said plurality of electronic devices; and
wherein, said AD converter converts electric characteristics of each of said electronic devices under said applied plurality of predetermined electric voltages to binary data according to the predetermined threshold value.
29 . An IC card that mounts a semiconductor chip in which a memory device is formed, wherein:
said semiconductor chip comprises: an electric voltage circuit which applies the predetermined electric voltage to a plurality of memory cells of the predetermined address area of said memory device; an AD converter which converts an electric characteristics of each of said memory cells under said applied electric voltage to a digital signal according to the predetermined threshold value; and a coding circuit which codes the pattern as an ID code of said IC card, which is lined up with said electric characteristics of each of said memory cells with the predetermined order.
30 . An IC card according to claim 29 , wherein, said AD converter converts electric characteristics of each of said memory cells under said applied electric voltage to binary data according to a plurality of thresholds.
31 . An IC card that mounts a semiconductor chip in which two memory areas or two memory devices are formed, wherein only a first memory area or a first memory device of said two memory areas or two memory devices has bit relief circuits.
32 . A method for identifying an article including the steps of:
mounting a semiconductor chip, in which plural numbers of memory cells are formed, in said article; detecting a fail bit pattern of memory cells in a fixed address space of said semiconductor chip; recording the fail bit pattern of said memory cells as an ID code of said article; detecting a fail bit pattern of memory cells in a fixed address space of a semiconductor chip mounted in an objective article to be identified; transferring the fail bit pattern of said memory cells of said semiconductor chip in said objective article to be identified to an ID code; comparing said ID code with ID codes recorded; and determining that said objective article corresponds to an article which has the same ID code recorded, on condition that said ID code is the same ID code as a recorded ID code.
33 . A method for identifying an article according to claim 32 , further including mounting a semiconductor chip, in which plural numbers of memory cells are formed, in said article;
wherein said fail bit pattern shows good or bad bit results and records the results together with an address, and a method of multivaluing the analog electric characteristic of a device corresponding to one address and recording the one address is enabled.Join the waitlist — get patent alerts
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