Graphics engine, and display driver IC and display module incorporating the graphics engine
Abstract
The invention provides a display driver integrated circuit, for connection to a small-area display, the integrated circuit including a hardware-implemented graphics engine for receiving vector graphics commands and rendering image data for display pixels in dependence upon the received commands, and also including display driver circuitry for driving the connected display in accordance with the image data rendered by the graphics engine. In another aspect the graphics engine is held within the display module, but not embedded in the display driver IC. The invention provides graphics acceleration that increases display performance, but does not significantly increase cost of manufacture. Power consumption in comparison to non-accelerated CPU graphics processing is lowered.
Claims
exact text as granted — not AI-modified1 . A graphics engine for rendering image data in dependence upon received vector commands including an edge-drawing unit to read in one polygon edge at a time, draw the edge and then discard the original command before processing the next command.
2 . A graphics engine according to claim 1 including control circuitry to read in one vector graphics command at a time, convert the command to spatial image information and then discard the original command.
3 . A graphics engine according to claim 1 including edge-drawing circuitry linked to an edge buffer to store sequentially the edges of any polygon read into the engine.
4 . A graphics engine according to claim 3 wherein the edge buffer is arranged to store sub-pixels, a plurality of sub-pixels corresponding to each display pixel.
5 . A graphics engine according to claim 4 wherein each sub-pixel is switchable between set and unset states and wherein the edge buffer stores each polygon edge as boundary sub-pixels which are set and whose positions in the edge buffer correspond to the edge position in the final image.
6 . A graphics engine according to claim 3 wherein the graphics engine includes filler circuitry to fill in polygons whose edges have been stored in the edge buffer.
7 . A graphics engine according to claim 1 wherein the graphics engine includes a back buffer to store part or all of an image before transfer to a front buffer of a display memory.
8 . A graphics engine according to claim 7 wherein each pixel of the back buffer is mapped to a pixel in the front buffer and the back buffer has the same number of bits per pixel as the front buffer to represent the colour (RGB value) of each display pixel.
9 . A graphics engine according to claim 7 wherein the graphics engine includes combination circuitry to combine sequentially each filled polygon from filler circuitry into the back buffer.
10 . A graphics engine according to claim 7 wherein the colour of each pixel stored in the back buffer is determined in dependence on a colour of the pixel in the polygon being processed, a percentage of the pixel covered by the polygon and a colour already present in the corresponding pixel in the back buffer.
11 . A graphics engine according to claim 3 wherein the edge buffer comprises sub-pixels in the form of a grid having a square number of sub-pixels for each display pixel.
12 . A graphics engine according to claim 11 wherein every other sub-pixel in the edge buffer is not utilised, so that half the square number of sub-pixels for each display pixel.
13 . A graphics engine according to claim 11 wherein a slope of each polygon edge is calculated from end points of the edge and then sub-pixels of the grid are set along the line.
14 . A graphics engine according to claim 12 wherein the following rules are used for setting sub-pixels:
one sub-pixel only per horizontal line of the sub-pixel grid is set for each polygon edge; the subpixels are set from top to bottom (in the Y direction); the last sub-pixel of the line is not set; any sub-pixels set under the line are inverted.
15 . A graphics engine according to claim 11 wherein the graphics engine includes filler circuitry to fill in polygons whose edges have been stored in the edge buffer and the circuitry includes logic acting as a virtual pen traversing the sub-pixel grid, said pen being initially off and toggling between the off and on states each time the pen encounters a set sub-pixel.
16 . A graphics engine according to claim 15 wherein the virtual pen sets all sub-pixels inside the boundary sub-pixels, and includes boundary pixels for right-hand boundaries, and clears boundary pixels for left-hand boundaries or vice versa.
17 . A graphics engine according to claim 9 wherein sub-pixels from the filler circuitry corresponding to a display pixel are amalgamated into a single pixel before combination to the back buffer.
18 . A graphics engine according to claim 11 wherein the number of sub-pixels of each amalgamated pixel covered by a filled polygon determines a blending factor for combination of the amalgamated pixel into a back buffer.
19 . A graphics engine according to claim 7 wherein the back buffer is copied to the front buffer of the display memory once the image on the part of the display for which it holds information has been entirely rendered.
20 . A graphics engine according to claim 7 wherein the back buffer is of the same size as the front buffer and holds information for the whole display.
21 . A graphics engine according to claim 7 wherein the back buffer is smaller than the front buffer and stores the information for part of the display only, the image in the front buffer being built from the back buffer in a series of external passes.
22 . A graphics engine according to claim 21 wherein only commands relevant to the part of the image to be held in the back buffer are sent to the graphics engine in each external pass.
23 . A graphics engine according to claim 3 wherein the graphics engine further includes a curve tessellator to divide any curved polygon edges into straight-line segments and store the resultant segments in the edge buffer.
24 . A graphics engine according to claim 7 wherein the graphics engine is adapted so that the back buffer can hold one or more predetermined image elements, which are transferred to the front buffer at one or more locations determined by the high level language.
25 . A graphics engine according to claim 3 wherein the graphics engine is operable in hairline mode, in which mode hairlines are stored in the edge buffer by setting sub-pixels in a bitmap and storing the bitmap in multiple locations in the edge buffer to form a line.
26 . A graphics engine according to claim 1 wherein the graphics engine is less than 100K gates in size and preferably less than 50K.
27 . A graphics engine according to claim 26 wherein the graphics engine is less than 50K gates in size.
28 . A graphics engine according to claim 1 wherein the graphics engine renders image data for a plurality of display driver integrated circuits.Join the waitlist — get patent alerts
Track US2005041039A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.