Integrated testing method for concurrent testing of a number of computer components through software simulation

Abstract

An integrated testing method is proposed to perform a test procedure on a number of computer components, concurrently, in a multitasking manner through software simulation. In this method, an initialization procedure is first performed to specify the total number of simulated operations, the FIFO buffer size, the command sequence, and the start time of operation. It is a characteristic feature of this integrated testing method that the test procedure is performed concurrently in a multitasking manner on all the components under test to operate in response to each command from the command sequence. In the event that two or more of the components under test are competing for the same resource, an arbiter is activated to perform arbitration for these competing components.

1 . A testing method in a multitasking manner for testing a number of components through software simulation, the testing method comprises: 
 concurrently activating said components by at least one command to simulate a certain task, when two or more components are competing for access to a resource, activating an arbiter to perform arbitration for these competing components, wherein the arbiter is a South Bridge chipset or a North Bridge chipset.    
     
     
         2 . The testing method of  claim 1 , wherein said at least one command is generated from a command sequence, with each command in said sequence being used to simulate a certain task.  
     
     
         3 . The testing method of  claim 1 , wherein said arbiter is activated to perform arbitration between said competing components and to put said competing components into idle state.  
     
     
         4 . The testing method of  claim 1 , wherein the resource is a PCI bus.  
     
     
         5 . The testing method of  claim 1 , wherein the resource is a memory unit.  
     
     
         6 . The testing method of  claim 1 , wherein the components are selected from the group consisting of a DMA component, a SIO component, an ISA component, an AC component, an USB component, an IDE component, an AGP component, a PCI component, and a CPU.  
     
     
         7 . The testing method of  claim 1 , wherein the components includes at least one South bridge component and at least one North bridge component.