Semiconductor device and method of manufacturing a semiconductor device

Abstract

A semiconductor device comprises: a semiconductor substrate; a gate insulating film formed on the top surface of the semiconductor substrate; a gate electrode formed on the gate insulating film; diffusion layers formed in the semiconductor substrate to be used a source layer and a drain layer; and a silicide layer formed to overlie the diffusion layers; wherein an oxygen concentration peak, where oxygen concentration is maximized, is at a level lower than said top surface in a cross-section taken along a plane perpendicular to said top surface.

1 .- 10 . (Canceled).  
     
     
         11 . A method of manufacturing a semiconductor substrate comprising: 
 forming a gate insulating film on the top surface of a semiconductor substrate;    forming a gate electrode on the gate insulating film;    forming diffusion layers in a self-aligned manner in the semiconductor substrate on opposite sides of the gate electrode;    forming an amorphous layer on the top surface of the semiconductor substrate above the diffusion layers;    implanting ions of an injection substance into the semiconductor substrate through an interface thereof with the amorphous layer;    annealing the semiconductor substrate at a relatively low temperature to partly change the amorphous layer to a single-crystal layer; and    sputtering a metal onto the single-crystal layer and thereby forming a silicide layer from the single crystal and the metal.    
     
     
         12 . The method according to  claim 11 , wherein, during the annealing of the semiconductor substrate, only selective parts of the amorphous layer located on the diffusion layers are changed to a single-crystal layer, and the other parts of the amorphous layer are not changed or are changed to a polycrystalline layer, and 
 the method further comprising:    selectively etching the amorphous layer or the polycrystalline layer after said annealing.    
     
     
         13 . The method according to  claim 11 , wherein the injection substance is germanium, its congener element, arsenic, its congener element, boron, its congener element, argon or its congener element.  
     
     
         14 . The method according to  claim 12 , wherein the injection substance is germanium, its congener element, arsenic, its congener element, boron, its congener element, argon or its congener element.  
     
     
         15 . The method according to  claim 11 , wherein annealing the semiconductor substrate at a temperature not higher than 600° C., during the annealing of the semiconductor substrate.  
     
     
         16 . The method according to  claim 12 , wherein annealing the semiconductor substrate at a temperature not higher than 600° C., during the annealing of the semiconductor substrate.  
     
     
         17 . The method according to  claim 13 , wherein annealing the semiconductor substrate at a temperature not higher than 600° C., during the annealing of the semiconductor substrate.  
     
     
         18 . The method according to  claim 14 , wherein annealing the semiconductor substrate at a temperature not higher than 600° C. during the annealing of the semiconductor substrate.  
     
     
         19 . The method according to  claim 12 , further comprising: 
 forming a protective layer to cover the sidewall of the gate electrode and the top surface of the gate electrode before forming the amorphous layer,    wherein the amorphous layer and the polycrystalline layer are etched at a temperature not lower than 700° C. during the etching the amorphous layer or the polycrystalline layer.