Semiconductor device structured to prevent oxide damage during HDP CVD

Abstract

A semiconductor device includes a patterned conductive layer on which an initial dielectric film is deposited by a non-etching deposition process. A second dielectric film is then deposited on the initial dielectric film by high-density plasma chemical vapor deposition (HDP CVD). The HDP CVD process etches the second dielectric film as it is being deposited, thereby smoothing the surface of the second dielectric film. The initial dielectric film insulates the patterned conductive layer from the plasma used in the HDP CVD process, so that plasma charge is not conducted to underlying oxide films, such as gate oxide films, and does not cause oxide damage.

1 . A method of fabricating a semiconductor device, comprising: 
 forming an insulating film on a surface of a substrate;    forming a patterned conductive layer on a the insulating film;    forming a sidewall on the patterned conductive layer;    depositing a first dielectric film covering exposed surfaces of the patterned conductive layer and the insulating film by a non-etching deposition process; and    depositing a second dielectric film on the first dielectric film by high-density plasma chemical vapor deposition (CVD), the first dielectric film preventing plasma charge from being conducted through the patterned conductive layer to the insulating film.    
   
   
       2 . The method of  claim 1 , wherein the first dielectric film is deposited by low-pressure CVD.  
   
   
       3 . The method of  claim 1 , wherein the first dielectric film is deposited by atmospheric-pressure CVD using tetraethylorthosilicate.  
   
   
       4 . The method of  claim 1 , wherein the first dielectric film is deposited by plasma-enhanced CVD.  
   
   
       5 . The method of  claim 1 , wherein the first dielectric film comprises silicon nitride.  
   
   
       6 . The method of  claim 1 , wherein the first dielectric film is less than one hundred nanometers thick.  
   
   
       7 . The method of  claim 1 , wherein the patterned conductive layer includes a gate electrode.  
   
   
       8 . The method of  claim 1 , wherein the patterned conductive layer is a metal interconnection layer.  
   
   
       9 . The method of  claim 1 , wherein the second dielectric film is an interlayer dielectric film.  
   
   
       10 . The method of  claim 1 , wherein the second dielectric film is a surface passivation film.  
   
   
       11 . A semiconductor device comprising: 
 a substrate;    an insulating film disposed on a surface of the substrate;    a patterned conductive layer disposed on the insulating film;    a sidewall making contact with a side of the patterned conductive layer;    a first dielectric film disposed on exposed surfaces of the patterned conductive layer and the insulating film, the first dielectric film being deposited by a non-etching deposition process; and    a high-density plasma CVD dielectric film disposed on the first dielectric film.    
   
   
       12 . The semiconductor device of  claim 11 , wherein the first dielectric film is deposited by low-pressure CVD.  
   
   
       13 . The semiconductor device of  claim 11 , wherein the first dielectric film is deposited by atmospheric-pressure CVD using tetraethylorthosilicate.  
   
   
       14 . The semiconductor device of  claim 11 , wherein the first dielectric film is deposited by plasma-enhanced CVD.  
   
   
       15 . The semiconductor device of  claim 11 , wherein the first dielectric film comprises silicon nitride.  
   
   
       16 . The semiconductor device of  claim 11 , wherein the first dielectric film is less than one hundred nanometers thick.  
   
   
       17 . The semiconductor device of  claim 11 , wherein the patterned conductive layer includes a gate electrode.  
   
   
       18 . The semiconductor device of  claim 11 , wherein the patterned conductive layer is a metal interconnection layer.  
   
   
       19 . The semiconductor device of  claim 11 , wherein the high-density plasma CVD dielectric film is an interlayer dielectric film.  
   
   
       20 . The semiconductor device of  claim 11 , wherein the high-density plasma CVD dielectric film is a surface passivation film.