US2005025909A1PendingUtilityA1

Method for the production of III-V laser components

Priority: Dec 21, 2001Filed: Jun 21, 2004Published: Feb 3, 2005
Est. expiryDec 21, 2021(expired)· nominal 20-yr term from priority
H10P 14/3416H10P 14/3216H10P 14/2926H10P 14/2905H01S 5/021H01S 5/32341
38
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

The invention relates to a method for the production of III-V laser components, whereby a III-V semiconductor layer is deposited on a silicon substrate in a process chamber of a reactor from a gaseous starting material. According to the invention, an economical method for the production of qualitatively high-grade laser may be achieved whereby, firstly, an Al-containing buffer layer is deposited on the Si substrate, in particular a Si(III) substrate, on which the III-V semiconductor layer, in particular, GaN is then deposited such that the lattice plane thereof runs parallel to the cleavage direction of the substrate, whereby, on cleaving the substrate plane-parallel layer, cleavage surfaces are formed.

Claims

exact text as granted — not AI-modified
1 . Method for producing III-V laser components, in which a III-V semiconductor layer is deposited on a silicon substrate, in particular an Si( 111 ) substrate, from gaseous starting substances in a process chamber of a reactor, wherein first of all an Al-containing buffer layer is deposited on the Si substrate, then the III-V semiconductor layer, in particular a GAN layer, and if appropriate further active layers, are deposited on the buffer layer, in such a manner that the lattice plane thereof runs parallel to the cleavage direction of the substrate, plane-parallel layer fracture surfaces then being produced by cleaving the substrate in the cleavage direction, and components in which the layer fracture surfaces form the laser facets subsequently being fabricated.  
     
     
         2 . Method according to  claim 1 , characterized in that the buffer layer consists of AIN or AIN with the addition of one or more further elements from group III or V.  
     
     
         3 . Method according to  claim 1 , characterized in that the buffer layer is a III-V semiconductor layer and is between 20 and 100 nm thick.

Join the waitlist — get patent alerts

Track US2005025909A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.