US2005023623A1PendingUtilityA1
Gate structure and method
Priority: Aug 31, 2001Filed: Aug 27, 2004Published: Feb 3, 2005
Est. expiryAug 31, 2021(expired)· nominal 20-yr term from priority
H10D 64/01346H10D 64/01344H10D 64/01342H10D 64/01324H10D 64/0134H10D 84/0181H10D 84/038H10D 64/693H10D 64/691H10D 64/518H10D 64/017
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Claims
Abstract
A MOSFET structure with high-k gate dielectrics for silicon or metal gates with gate dielectric liquid-based oxidation surface treatments prior to gate material deposition and gate formation.
Claims
exact text as granted — not AI-modified1 . A method of field effect transistors, comprising:
(a) forming a dielectric layer on a semiconductor substrate, said dielectric layer including M w Si x O y N z with M a metal selected from the group consisting of Hf, Zr, La, Gd, Pr, Y, and mixtures thereof; (b) exposing said dielectric layer to a oxidizing liquid solution; and (c) forming gates on said dielectric layer after said exposing of step (b).
2 . The method of claim 1 , wherein:
(a) said exposing of step (b) of claim 1 is by immersing said dielectric layer and substrate in said liquid solution.
3 . The method of claim 1 , wherein:
(a) said exposing of step (b) of claim 1 is by spraying in said liquid solution onto said dielectric layer.
4 . The method of claim 1 , wherein:
(a) said solution is H 2 O 2 plus H 2 O.
5 . The method of claim 1 , wherein:
(a) said solution is taken from the group consisting of H 2 SO 4 +H 2 O 2 +H 2 O, H 2 SO 4 +H 2 O, HNO 3 +H 2 O, HNO 3 +H 2 O 2 +H 2 O, HCl+H 2 O 2 +H 2 O; NH 4 OH+H 2 O 2 +H 2 O; and H 2 O+O 3 .
6 . The method of claim 1 , further comprising the step of:
(a) after said exposing of step (b) of claim 1 but prior to said gate forming step (c) of claim 1 , annealing said dielectric layer in an inert atmosphere.
7 . The method of claim 1 , further comprising the step of:
(a) after said forming of step (a) of claim 1 but prior to said exposing step (b) of claim 1 , annealing said dielectric layer in an inert atmosphere.
8 . The method of claim 1 , wherein:
(a) M is Hf; and (b) the ratio of x to w is in the range of 0 to 10.
9 . A gate dielectric material, comprising:
(a) M w M′ x O y N z where M is taken from the group consisting of Hf, Zr, La, Gd, Pr, Y, and mixtures thereof, and M′ is taken from the group consisting of Al, Si, and mixtures thereof; (b) wherein the ratio of w+x to y+z is roughly 1 to 2; and (c) wherein the ratio of z to y is in the range of 0.005 to 2.
10 . The material of claim 9 , wherein:
(a) M w M′ x O y N z is Hf w Si x O y N z with w in the range of 6 to 15, x in the range of 20 to 25, y in the range of 33 to 55, and z in the range of 16 to 32.Join the waitlist — get patent alerts
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