Time domain data converter with output frequency domain conversion

Abstract

A time domain data converter with output frequency domain conversion. A data conversion circuit is operable to receive a signal in the time domain and provide an output in the frequency domain. It includes a data converter for converting data from an analog format to a digital format in the time domain. It also includes a processor for processing the data in the digital format output from the data converter through a time domain/frequency domain transform to provide data in the digital format in the frequency domain.

1 . A data conversion circuit for receiving a signal in the time domain and providing an output in the frequency domain, comprising: 
 a data converter for converting data from an analog format to a digital format in the time domain;    a transform processor for processing the data in the digital format output through a time domain/frequency domain transform to provide data in a digital format in the frequency domain; and    an interface for interfacing the output of said data converter to the input of said transform processor.    
   
   
       2 . The data conversion circuit of  claim 1 , wherein the output of said data converter and the output of said transform processor are input to a multiplexer, said multiplexer controlled by a control signal to select either the output of said data converter or the output of said transform processor to provide a single output from the data conversion circuit.  
   
   
       3 . The data conversion circuit of  claim 1 , and further comprising a timing circuit for controlling the timing operation of said data converter and said transform processor such that the operation of said data converter and said transform processor are associated with a common time base.  
   
   
       4 . The data conversion circuit of  claim 1 , wherein said data converter is operable to output a plurality of sampled values at a sampling rate at of f s  and wherein said time domain/frequency domain transform operates on a predetermined number of samples as a block of samples, wherein said calculations performed by said time domain/frequency domain transform require all of said samples in said block.  
   
   
       5 . The data conversion circuit of  claim 4 , wherein said time domain/frequency domain transform comprises a discrete fourier transform (DFT).  
   
   
       6 . The data conversion circuit of  claim 4 , wherein said transform processor is operable to perform a partial transform after the receipt of each sample in said block.  
   
   
       7 . The data conversion circuit of  claim 6 , wherein there are N samples in each of said blocks and said DFT transform calculates N/2 real parts and N/2 imaginary values.  
   
   
       8 . The data conversion circuit of  claim 4 , wherein the output of said transform processor comprises a plurality of real and imaginary values, each associated with a frequency bin, there being in N/2 bins for N samples.  
   
   
       9 . The data conversion circuit of  claim 4 , wherein said time domain/frequency domain transform comprises a fast fourier transform.  
   
   
       10 . The data conversion circuit of  claim 4 , wherein said time domain/frequency domain transform comprises a Goertzel transform.  
   
   
       11 . The data conversion circuit of  claim 1 , and further comprising a controller varying the operation of the time domain/frequency domain transform through variation of associated parameters in response to external program signals, such that the operation of said time domain/frequency domain transform can be altered.  
   
   
       12 . The data conversion circuit of  claim 1 , and further comprising a digital time domain processor for processing the output of said data converter in the digital time domain prior to input to said transform processor through said interface.  
   
   
       13 . The data conversion circuit of  claim 12 , wherein said digital time domain processor and said time domain/frequency domain transform are realized with a single processing engine.  
   
   
       14 . The data conversion circuit of  claim 1 , and further comprising a post-processor for receiving the output of said transform processor and performing predetermined operations thereon prior to output therefrom.  
   
   
       15 . The data conversion circuit of  claim 14 , and further comprising a memory for storing the output of said post-processor.  
   
   
       16 . The data conversion circuit of  claim 1 , and further comprising a memory for storing the output of said transform processor.  
   
   
       17 . The data conversion circuit of  claim 1 , and further comprising a controller for varying both the time domain and frequency domain operation through variation of associated parameters in response to external program signals.  
   
   
       18 . The data conversion circuit of  claim 1 , and further comprising a controller for varying both the time domain and frequency domain operation through variation of associated parameters in response to external program signals received through a common control interface.  
   
   
       19 . A method for receiving a signal in the time domain and providing an output in the frequency domain, comprising the steps of: 
 converting data with a data converter from an analog format to a digital format in the time domain;    processing the data with a transform processor in the digital format output through a time domain/frequency domain transform to provide data in a digital format in the frequency domain; and    interfacing the output of the data converter to the input of the transform processor.    
   
   
       20 . The method of  claim 19 , and further comprising the step of inputting the output of the data converter and the output of the transform processor to a multiplexer, and controlling the multiplexer by a control signal to select either the output of the data converter or the output of the transform processor to provide a single output therefrom.