US2005017277A1PendingUtilityA1
Pixel cell with high storage capacitance for a COMS imager
Priority: Feb 25, 2000Filed: Aug 24, 2004Published: Jan 27, 2005
Est. expiryFeb 25, 2020(expired)· nominal 20-yr term from priority
Inventors:Howard E. Rhodes
H10F 39/803H10F 39/802H10F 39/18H10F 39/811
45
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Claims
Abstract
A pixel sensor cell for use in a CMOS imager exhibiting improved storage capacitance. The source follower transistor is formed with a large gate that has an area from about 0.3 μm 2 to about 10 μm 2 . The large size of the source follower gate enables the photocharge collector area to be kept small, thereby permitting use of the pixel cell in dense arrays, and maintaining low leakage levels. Methods for forming the source follower transistor and pixel cell are also disclosed.
Claims
exact text as granted — not AI-modified1 - 94 . (Canceled).
95 . A method of operating a pixel device comprising:
receiving a plurality of photons at a first doped semiconductor region; converting at least a portion of the plurality of photons to a plurality of charges in the first doped semiconductor region; accumulating the plurality of charges in a second doped semiconductor region; transferring the plurality of charges through an electrically conductive path to a gate of a source follower transistor, the gate having an area of from between about 0.3 μm 2 to about 25 μm 2 ; and conducting an electrical current through the transistor, the electrical current having a magnitude related to a quantity of the plurality of photons.
96 . A method of operating a pixel device as defined in claim 95 further comprising receiving the plurality of photons at the first semiconductor region through a photo gate.
97 . A method of operating a pixel device as defined in claim 95 wherein the electrically conductive path comprises a transfer transistor.
98 . A method operating a pixel device as defined in claim 95 wherein the transferring the plurality of charges through an electrically conductive path comprises transferring the plurality of charges through an interconnect.
99 . A method of operating a pixel device as defined in claim 98 wherein the interconnect comprises a doped semiconductor material.
100 . A method of operating a pixel device as defined in claim 98 wherein the interconnect comprises a metal material.
101 . A method of operating a pixel device as defined in claim 100 wherein the metal material comprises a refractory metal material.
102 . A method of forming a photosensitive device comprising:
forming photosensitive region disposed at a first portion of a semiconductor substrate, the photosensitive region being adapted to receive a flux of photons and responsively generate a plurality of charges; forming a transistor gate disposed at a second portion of the semiconductor substrate, the transistor gate being adapted to receive and store a portion of the plurality of charges, the transistor gate having an areal dimension of between about 0.3 μm 2 and about 25 μm 2 ; and forming an electrically conductive path between the photosensitive region and the transistor gate, the electrically conductive path being adapted to share charges between the photosensitive region and the transistor gate.
103 . A method of forming a photosensitive device as defined in claim 102 wherein the conductive path comprises a transfer transistor disposed in a third region of the semiconductor substrate.
104 . A method of forming a photosensitive device as defined in claim 102 wherein the conductive path comprises a metal material.
105 . A method of forming a photosensitive device as defined in claim 104 wherein the metal material comprises copper.
106 . A method of forming a photosensitive device as defined in claim 104 wherein the conductive path comprises a refractory metal material.
107 . A method of forming a photosensitive device as defined in claim 106 wherein the refractory metal material comprises tungsten.Join the waitlist — get patent alerts
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