Methods of forming magnetoresistive memory devices and assemblies

Abstract

The invention encompasses a magnetoresistive memory device. The device includes a memory bit which comprises a stack having a first magnetic layer, a second magnetic layer, and a non-magnetic layer between the first and second magnetic layers. A first conductive line is proximate the stack and configured for utilization in reading information from the memory bit. A second conductive line is spaced from the stack by a greater distance than the first conductive line is spaced from the stack, and is configured for utilization in writing information to the memory bit. The invention also encompasses methods of storing and retrieving information in a cross-point array architecture.

1 - 47 . (cancelled).  
   
   
       48 . A method of forming a magnetoresistive memory device, comprising: 
 forming a memory bit comprising a stack which includes a first magnetic layer, a second magnetic layer, and a non-magnetic layer between the first and second magnetic layers; the memory bit storing information as a relative orientation of a magnetic moment in the first magnetic layer to a magnetic moment in the second magnetic layer;    forming a first conductive line proximate the stack and configured for utilization in reading information from the memory bit;    forming a second conductive line spaced from the stack by a greater distance than any distance which the first conductive line is spaced from the stack, and configured for utilization in writing information to the memory bit;    wherein the first and second conductive lines extend longitudinally parallel to one another;    wherein the first conductive line is not utilized in writing information to the memory bit; and    wherein the second conductive line is not utilized in reading information from the memory bit.    
   
   
       49 . The method of  claim 48  wherein the first conductive line is in ohmic electrical contact with at least one of the magnetic layers of the memory bit, and wherein the second conductive line is not in ohmic electrical contact with either of the magnetic layers of the memory bit.  
   
   
       50 . The method of  claim 48  wherein the first and second magnetic layers comprise one or more of nickel, iron, cobalt, iridium, manganese, platinum and ruthenium.  
   
   
       51 . The method of  claim 48  wherein the non-magnetic layer comprises an electrically insulative material.  
   
   
       52 . The method of  claim 48  wherein the non-magnetic layer comprises an electrically conductive material.  
   
   
       53 . The method of  claim 48  wherein the first conductive line physically contacts one of the first and second magnetic layers.  
   
   
       54 . The method of  claim 48  further comprising forming an electrically insulative material between the first and second conductive lines; and wherein the second conductive line is spaced from the stack by at least a combined thickness of the electrically insulative material and the first conductive line.  
   
   
       55 . The method of  claim 54  wherein the electrically insulative material comprises a layer which includes one or both of silicon dioxide and silicon nitride, and which is at least about 100 Å thick.  
   
   
       56 . The method of  claim 48  further comprising forming an electrically insulative material between the first and second conductive lines, and wherein: 
 the second conductive line is spaced from the stack by at least a combined thickness of the electrically insulative material and the first conductive line; and    the first conductive line physically contacts one of the first and second magnetic layers.    
   
   
       57 . The method of  claim 48  further comprising forming a third conductive line proximate the stack; the third conductive line being configured for utilization in both writing information to the memory bit and reading information from the memory bit.  
   
   
       58 . The method of  claim 57  wherein the first conductive line physically contacts one of the first and second magnetic layers, and wherein the third conductive line physically contacts the other of the first and second magnetic layers.  
   
   
       59 . The method of  claim 57  further comprising forming an electrically insulative material between the first and second conductive lines, and wherein: 
 the second conductive line is spaced from the stack by at least a combined thickness of the electrically insulative material and the first conductive line;    the first conductive line physically contacts one of the first and second magnetic layers; and    the third conductive line physically contacts the other of the first and second magnetic layers.    
   
   
       60 . A method of forming a magnetoresistive memory device, comprising: 
 forming a stack comprising a first magnetic layer, a second magnetic layer, and a non-magnetic layer between the first and second magnetic layers;    providing a first conductive line over the stack and configured to generate an electrical field which sufficiently overlaps at least a first portion of the stack to alter a magnetic orientation within at least one of the magnetic layers;    providing a second conductive line under the stack and configured to generate an electrical field which sufficiently overlaps at least a second portion of the stack to alter a magnetic orientation within at least one of the magnetic layers;    providing an electrically insulative spacer under the second conductive line;    providing a third conductive line under the insulative spacer and spaced from the second conductive line by at least the insulative spacer; the third conductive line being configured to generate an electrical field which sufficiently overlaps at least a third portion of the stack to alter a magnetic orientation within at least one of the magnetic layers; and    wherein the second and third conductive lines extend longitudinally parallel to one another.    
   
   
       61 . The method of  claim 60  wherein the first, second and third conductive lines alter a magnetic orientation within the same one of the two magnetic layers, and do not alter a magnetic orientation of the other of the two magnetic layers.  
   
   
       62 . The method of  claim 60  wherein the first and second magnetic layers comprise one or more of nickel, iron, cobalt, iridium, manganese, platinum and ruthenium.  
   
   
       63 . The method of  claim 60  wherein the non-magnetic layer comprises an electrically insulative material.  
   
   
       64 . The method of  claim 60  wherein the non-magnetic layer comprises aluminum oxide.  
   
   
       65 . The method of  claim 60  wherein the non-magnetic layer comprises an electrically conductive material.  
   
   
       66 . The method of  claim 60  wherein the non-magnetic layer comprises copper.  
   
   
       67 . The method of  claim 60  wherein the first conductive line is electrically connected to circuitry configured to maintain a maximum amperage within the first conductive line to a level of from about 1 milliamp to about 10 milliamps.  
   
   
       68 . The method of  claim 60  wherein the second conductive line is electrically connected to circuitry configured to maintain a maximum amperage within the second conductive line to a level of from about 500 nanoamps to about 1 microamp.  
   
   
       69 . The method of  claim 60  wherein the third conductive line is electrically connected to circuitry configured to maintain a maximum amperage within the third conductive line to a level of from about 1 milliamp to about 10 milliamps.  
   
   
       70 . The method of  claim 60  wherein: 
 the first conductive line is electrically connected to circuitry configured to maintain a maximum amperage within the first conductive line to a level of from about 1 milliamp to about 10 milliamps;    the second conductive line is electrically connected to circuitry configured to maintain a maximum amperage within the second conductive line to a level of from about 500 nanoamps to about 1 microamp; and    the third conductive line is electrically connected to circuitry configured to maintain a maximum amperage within the third conductive line to a level of from about 1 milliamp to about 10 milliamps.