US2005012177A1PendingUtilityA1

Oversized integrated circuit component

Priority: Feb 12, 2002Filed: Aug 12, 2004Published: Jan 20, 2005
Est. expiryFeb 12, 2022(expired)· nominal 20-yr term from priority
H10W 20/40
42
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Claims

Abstract

An integrated circuit element includes a metal region having a geometric shape that exceeds prescribed integrated circuit manufacture limits and a non-conducting region within the metal region.

Claims

exact text as granted — not AI-modified
1 . An integrated circuit element comprises: 
 a metal region having a geometric shape that exceeds prescribed integrated circuit manufacture limits;    a non-conducting region within the metal region.    
   
   
       2 . The integrated circuit element of  claim 1 , wherein the non-conducting region further comprises at least one of: a slit within the electrical element, a series of slits within the electrical element, a hole within the electrical element, and a series of holes within the electrical element.  
   
   
       3 . The integrated circuit element of  claim 1 , wherein the metal region constitutes at least one turn of an inductor.  
   
   
       4 . The integrated circuit element of  claim 3  further comprises: 
 a second metal region that has a second geometric shape that exceeds the prescribed integrated circuit manufacture limits; and    at least one non-conducting second region within the second metal region, wherein the second metal constitutes at least one other turn of the inductor, and wherein the at least one turn is connected to the at one other turn in parallel or in series.    
   
   
       5 . The integrated circuit element of  claim 1  further comprises: 
 the metal region functioning as a plate of a capacitor;    a dielectric layer, wherein a first major surface of the dielectric layer is juxtaposed to a major surface of the plate; and    a second metal region that functions as a second plate of the capacitor, wherein the second metal region has a geometric shape that exceeds the prescribed integrated circuit manufacture limits, wherein a major surface of the second plate is juxtaposed to a second major surface of the dielectric layer, and wherein the second metal region includes at least one non-conductive region that negligibly effects electrical characteristics of the capacitor and provides adequate non-conducting spacing in accordance with the prescribed integrated circuit manufacture limits.    
   
   
       6 . The integrated circuit element of  claim 1 , wherein the metal region constitutes an electromagnetic shield.  
   
   
       7 . The integrated circuit element of  claim 1 , wherein the metal region constitutes a ground plane.  
   
   
       8 . The integrated circuit element of  claim 1 , wherein the metal region constitutes a power source trace.  
   
   
       9 . The integrated circuit element of  claim 1 , wherein the metal region constitutes at least one of: a gate of a transistor, a source of the transistor, and a drain of the transistor.  
   
   
       10 . The integrated circuit element of  claim 1 , wherein the metal region constitutes an antenna.

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