Semiconductor device and manufacturing method thereof

Abstract

A threshold voltage change and degradation of the drain saturation current over a period of time of a MOS transistor are prevented by providing a permeable insulating film that serves as an inter-layer etching stopper layer on the surface of a plug, and an inter-layer insulating film that can be made from a low dielectric constant organic insulating film.

1 - 7 . (canceled).  
   
   
       8 . A manufacturing method of a semiconductor device, containing a MOS transistor formed on a semiconductor substrate, and a multilayer wiring structure formed on the semiconductor substrate and connected to the MOS transistor, comprising: 
 a step for forming an inter-layer insulating film on the semiconductor substrate,    a step for forming a permeable insulating film on the inter-layer insulating film, and    a heat-treatment process at a temperature of 200 degrees C. or higher.    
   
   
       9 . The manufacturing method of the semiconductor device as claimed in  claim 8 , wherein the permeable insulating film is a silicon carbide film.  
   
   
       10 . The manufacturing method of the semiconductor device as claimed in  claim 8 , further comprising a step for polishing a wiring layer that constitutes the multilayer wiring structure by a chemical mechanical polishing method, the step being provided between the step for forming the inter-layer insulating film, and the step for forming the permeable insulating film on the inter-layer insulating film.  
   
   
       11 . The manufacturing method of the semiconductor device as claimed in  claim 8 , wherein the inter-layer insulating film is a low dielectric constant organic film.  
   
   
       12 . The manufacturing method of the semiconductor as claimed in  claim 8 , wherein the inter-layer insulating film is constituted by a layer of a low dielectric constant organic film and an inorganic insulating film.  
   
   
       13 . The manufacturing method of the semiconductor device as claimed in  claim 11 , wherein the low dielectric constant organic film is constituted by one of a hydrocarbon polymer and a fluorinated aromatic polymer.  
   
   
       14 . The manufacturing method of the semiconductor device as claimed in  claim 8 , wherein a silicon nitride film is formed such that a side wall insulating film of a gate electrode of the MOS transistor is covered.  
   
   
       15 . The manufacturing method of the semiconductor device as claimed in  claim 8 , wherein a conductive pattern formed in the inter-layer insulation film contains Cu.