Buffer page roll implementation for PCI-X block read transactions

Abstract

A computer system containing logic for processing a read block transaction from a PCI-X device. A technique is also disclosed for processing a read block transaction from a PCI-X device. The technique is defined by PCI-X specifications wherein the read block transaction is processed accordingly in a computer system. The technique determines whether the transaction is a read block and whether the transaction crosses a memory boundary. The technique also determines whether a page roll is required and administers one if it is required. Furthermore, the technique provides a means for reading and delivering the data to a PCI-X device.

1 . A method for processing a read block transaction requested from a PCI-X device, the method comprising the acts of: 
 a) determining whether a read block transaction having a starting address and a ending address crosses a memory boundary;    b) if the read block transaction crosses the memory boundary, reading data from the starting address to the memory boundary into a first buffer; and    c) reading data from the memory boundary to the ending address of the read block transaction into a second buffer.    
   
   
       2 . The method as in  claim 1 , wherein act (a) comprises the acts of: 
 determining whether the starting address is aligned with the memory boundary;    determining whether a sum of the starting address and byte count of the read block transaction exceeds the memory boundary; and    if the starting address is not aligned with the memory boundary and if the sum of the starting address and byte count is equal to the memory boundary, providing an indication that the read block transaction crosses the memory boundary.    
   
   
       3 . The method as in  claim 2 , wherein the act of providing an indication comprises the act of setting a page roll attribute to a logical  1 .  
   
   
       4 . The method as in  claim 1 , wherein if the read block transaction does not cross the memory boundary, reading data from the starting address to the ending address into the first buffer.  
   
   
       5 . The method as in  claim 1 , wherein act (a) comprises the act of computing whether the read block transaction crosses the memory boundary by adding the starting address of the read block transaction and the byte count of the read block transaction.  
   
   
       6 . (Cancelled).  
   
   
       7 . (Cancelled).  
   
   
       8 . The method as in  claim 1 , comprising the act of delivering data from each of the first and second buffers to the PCI-X device.  
   
   
       9 . The method as in  claim 1 , wherein the memory boundary is equal to 4 KB.  
   
   
       10 . The method as in  claim 1 , wherein a byte count for the read block transaction is 4 KB.  
   
   
       11 . The method as in  claim 1 , wherein acts (a) through (c) are performed in the recited order.  
   
   
       12 . A system for processing a read block transaction requested from a PCI-X device, comprising: 
 means for determining whether a read block transaction having a starting address and an ending address crosses a memory boundary;    means for reading data from the starting address up to the memory boundary into a first buffer, if the read block transaction crosses the memory boundary; and    means for reading data from the memory boundary to the ending address of the read block transaction into a second buffer.    
   
   
       13 . The system of  claim 12 , wherein the determining means comprises: 
 means for determining whether the starting address is aligned with the memory boundary;    means for determining whether a sum of the starting address and byte count of the read block transaction exceeds the memory boundary; and    means for providing an indication that the read block transaction crosses the memory boundary, if the starting address is not aligned with the memory boundary.    
   
   
       14 . The system of  claim 13 , wherein the means for providing an indication that the read block transaction crosses the memory boundary comprises means for setting a page roll.  
   
   
       15 . The system of  claim 12 , comprising means for reading data from a starting address to the ending address into the first buffer, if the read block transaction does not cross the memory boundary.  
   
   
       16 . The system of  claim 12 , comprising means for calculating whether the read block transaction crosses the memory boundary by adding the starting address and read block transaction byte count.  
   
   
       17 . (Cancelled).  
   
   
       18 . (Cancelled).  
   
   
       19 . The system of  claim 12 , further comprising means for delivering data from each of the first and second buffers to the PCI-X device.  
   
   
       20 . The system of  claim 12 , further comprising means for determining whether a read block transaction having a starting address and a ending address crosses a 4 KB memory boundary.  
   
   
       21 . A tangible medium for processing a read block transaction requested from a PCI-X device, the tangible medium comprising: 
 a) a routine for determining whether a read block transaction having a starting and an ending address crosses a memory boundary;    b) a routine for reading data from the starting address up to the memory boundary into a first buffer, if the read block transaction crosses the memory boundary; and    c) a routine for reading data from the memory boundary to the ending address of the read block transaction into a second buffer.    
   
   
       22 . The tangible medium as in  claim 21 , wherein routine (a) comprises: 
 a routine for determining whether the starting address is aligned with the memory boundary;    a routine for determining whether a sum of the starting address and byte count of the read block transaction exceeds the memory boundary; and    a routine for providing an indication that the read block transaction crosses the memory boundary, if the starting address is not aligned to the memory boundary.    
   
   
       23 . The tangible medium as recited in  claim 22 , wherein the routine for providing an indication comprises: 
 a routine for providing an indication that the read block transaction crosses the memory boundary; and    a routine for setting a page roll attribute to a logical 1.    
   
   
       24 . The tangible medium as in  claim 22 , wherein the routine for determining whether the sum of the starting position address and byte count of the read block transaction comprises a routine for calculating whether the read block transaction crosses the memory boundary by adding the starting address and the byte count of the read block transaction.  
   
   
       25 . (Cancelled).  
   
   
       26 . The tangible medium as in  claim 21 , comprising a routine for delivering data from each of the first and second buffers to the PCI-X device.  
   
   
       27 . The tangible medium as in  claim 21 , comprising a routine for reading data from the starting address up to a 4 KB memory boundary into the first buffer.  
   
   
       28 . The tangible medium as in  claim 21 , wherein the tangible medium comprises at least one of a read only memory, a random access memory, a disc, an application specific integrated circuit, and a programmable logic device.  
   
   
       29 . A system for processing a read block transaction requested from a PCI-X device comprising: 
 at least one processor;    a memory operatively coupled to the at least one processor; and    at least one bridge operatively coupled to the memory and configured to receive a read block transaction, the bridge configured to determine whether a read block transaction having a starting address and an ending address transaction crosses a memory boundary, wherein if the block transaction crosses the memory boundary read data from the starting address to the memory boundary into a first buffer, and read data from the memory boundary to the ending address of the read block transaction into a second buffer.    
   
   
       30 . The system of  claim 29 , wherein the bridge determines whether the starting address is aligned to the memory boundary.  
   
   
       31 . The system of  claim 29 , wherein the bridge provides an indication that the read block transaction crosses the memory boundary, if the starting address is not aligned to the memory boundary.  
   
   
       32 . (Cancelled).  
   
   
       33 . The system of  claim 29 , wherein data from the starting address to the ending address is read into the first buffer, if the read block transaction does not cross the memory boundary.  
   
   
       34 . The system of  claim 29 , wherein the bridge computes whether the memory boundary is crossed by the read block transaction by adding the starting address and byte count of the read block transaction.  
   
   
       35 . (Cancelled).  
   
   
       36 . The system of  claim 29 , wherein the bridge delivers data from each of the first and second buffers to the PCI-X device.  
   
   
       37 . The system of  claim 29 , wherein the memory boundary is equal to 4 KB.  
   
   
       38 . A method for processing a read block transaction requested from a PCI-X device, the method comprising the acts of: 
 a) determining whether a read block transaction having a starting address and an ending address crosses a memory boundary;    b) if the read block transaction crosses the memory boundary, allocating a plurality of buffers for the read block transaction, reading data from the starting address up to the memory boundary into a first buffer of the plurality of buffers; and    c) reading data from the memory boundary to the ending address of the read block transaction into a second buffer of the plurality of buffers.    
   
   
       39 . The method as in  claim 38 , wherein act (a) comprises the acts of: 
 determining whether the starting address is aligned with the memory boundary;    determining whether the sum of the starting address and byte count of the read block transaction exceed the memory boundary; and    if the starting address is not aligned to the memory boundary and if the sum of the starting address and byte count is equal to the memory boundary, providing an indication that the read block transaction crosses the memory boundary.    
   
   
       40 . The method as in  claim 39 , wherein the act of providing an indication comprises the act of allocating the plurality of buffers to the read block transaction.  
   
   
       41 . The method as in  claim 38 , wherein if the read block transaction does not cross the memory boundary, reading data from the starting address to the ending address into the first buffer.  
   
   
       42 . The method as in  claim 38 , wherein act (a) comprises the act of computing whether the read block transaction crosses the memory boundary by adding the starting address and read block transaction byte count.  
   
   
       43 . (Cancelled)  
   
   
       44 . The method as in  claim 38 , comprising the act of delivering data from the first and second buffers to the PCI-X device.  
   
   
       45 . The method as in  claim 38 , wherein the memory boundary equals 4 KB.  
   
   
       46 . The method as in  claim 38 , wherein acts (a) through (c) are performed in the recited order.