US2005009336A1PendingUtilityA1
Metal deposition apparatus used in fabrication of semiconductor devices and methods of forming metal layers using the same
Priority: Jul 7, 2003Filed: Mar 30, 2004Published: Jan 13, 2005
Est. expiryJul 7, 2023(expired)· nominal 20-yr term from priority
H10W 20/052H10W 20/032H10W 20/031C23C 16/54C23C 16/4408H10P 72/0452C23C 16/4405C23C 16/45574
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Claims
Abstract
A metal deposition processing apparatus includes a first processing chamber configured for holding a semiconductor substrate therein. A second processing chamber is configured for holding the semiconductor substrate therein and for forming an upper metal layer thereon. A transfer chamber is connected to the first processing chamber and the second processing chamber. The transfer chamber is configured to transfer the semiconductor substrate between the first processing chamber and the second processing chamber.
Claims
exact text as granted — not AI-modified1 . A metal deposition processing apparatus comprising:
a first processing chamber configured for holding a semiconductor substrate therein and for processing a barrier metal layer thereon; a second processing chamber configured for holding the semiconductor substrate therein and for forming an upper metal layer thereon; and a transfer chamber isolated from an oxygen atmosphere and connected to the first processing chamber and the second processing chamber, the transfer chamber configured to transfer the semiconductor substrate between the first processing chamber and the second processing chamber.
2 . The apparatus of claim 1 , wherein the first processing chamber is configured for forming the barrier metal layer on the semiconductor substrate, and the second processing chamber is configured for forming the upper metal layer on at least a portion of the barrier metal layer on the semiconductor substrate.
3 . The apparatus of claim 2 , wherein the first processing chamber is a metal organic chemical vapor deposition (MOCVD) chamber.
4 . The apparatus of claim 3 , wherein the MOCVD chamber includes at least one source gas supply conduit that supplies a metal organic precursor.
5 . The apparatus of claim 1 , wherein the first processing chamber is configured for flushing the barrier metal layer on the semiconductor substrate, and the second processing chamber is configured for forming the upper metal layer on at least a portion of the barrier metal layer on the semiconductor substrate.
6 . The apparatus of claim 5 , wherein the first processing chamber is configured for performing a metal organic chemical vapor deposition technique to flush the barrier metal layer on a semiconductor substrate, the first processing chamber including at least one flushing gas supply conduit for flushing the barrier metal layer.
7 . The apparatus of claim 6 , wherein the flushing gas supply conduit includes a flushing gas selected from the group consisting of gases containing a halogen group element and gases containing a halogen group element and a transition metal.
8 . The apparatus of claim 6 , wherein the flushing gas supply conduit includes a flushing gas containing a TiCl 4 gas.
9 . The apparatus of claim 1 , further comprising a first gate valve between the first processing chamber and the transfer chamber for isolating the first processing chamber and the transfer chamber and a second gate valve between the second processing chamber and the transfer chamber for isolating the second processing chamber and the transfer chamber.
10 . The apparatus of claim 1 , further comprising a transfer robot configured for transferring a semiconductor substrate from the transfer chamber to and from the first processing chamber and the second processing chamber.
11 . The apparatus of claim 1 , wherein the second processing chamber is a chemical vapor deposition (CVD) chamber, an atomic layer deposition (ALD) chamber or a physical vapor deposition (PVD) chamber.
12 . The apparatus of claim 1 , further comprising at least one load lock chamber connected to the transfer chamber that isolates the transfer chamber from an external atmosphere, the load lock chamber configured to transfer a semiconductor substrate to the transfer chamber.
13 . The apparatus of claim 1 , further comprising a heating processing chamber connected to the transfer chamber for holding the semiconductor substrate therein and for heating the semiconductor substrate.
14 . The apparatus of claim 1 , further comprising a cooling processing chamber connected to the transfer chamber for holding the semiconductor substrate therein, the cooling processing chamber including a circulation conduit for providing a flow path for a coolant for cooling the semiconductor substrate.
15 . The apparatus of claim 1 , further comprising an alignment processing chamber connected to the transfer chamber, the alignment processing chamber including an optical sensor to align the semiconductor substrate.
16 . A method of forming metal layers on a semiconductor substrate comprising:
forming a barrier metal layer on a semiconductor substrate in a first processing chamber; transferring the semiconductor substrate from the first processing chamber to a transfer chamber that is isolated from an oxygen atmosphere; transferring the semiconductor substrate from the transfer chamber to a second processing chamber; and forming an upper metal layer on the barrier metal layer in the second processing chamber.
17 . The method of claim 16 , further comprising isolating the first processing chamber and the second processing chamber from the transfer chamber using a gate valve.
18 . The method of claim 16 , wherein forming a barrier metal layer includes using a metal organic chemical vapor deposition (MOCVD) method.
19 . The method of claim 16 , wherein forming an upper metal layer includes using a chemical vapor deposition (CVD) technique, an atomic layer deposition (ALD) technique, or a physical vapor deposition (PVD) technique.
20 . The method of claim 16 , further comprising heating the semiconductor substrate in a heating chamber connected to the transfer chamber prior to forming the barrier metal layer.
21 . The method of claim 16 , further comprising cooling the semiconductor substrate in a cooling chamber connected to the transfer chamber.
22 . The method of claim 16 , further comprising:
loading the semiconductor substrate into a load lock chamber connected to the transfer chamber prior to forming the barrier metal layer; transferring the semiconductor substrate from the load lock chamber to the transfer chamber; and transferring the semiconductor substrate from the transfer chamber to the first processing chamber.
23 . The method of claim 16 , further comprising:
after forming the upper metal layer, transferring the semiconductor substrate from the second processing chamber to the transfer chamber; transferring the semiconductor substrate from the transfer chamber to a load lock chamber; and unloading the semiconductor substrate from the load lock chamber.
24 . A method of forming metal layers on a semiconductor substrate comprising:
forming a barrier metal layer on a semiconductor substrate using a metal organic chemical vapor deposition technique; flushing the barrier metal layer in a first processing chamber; transferring the semiconductor substrate from the first processing chamber to a transfer chamber that is isolated from an oxygen atmosphere; transferring the semiconductor substrate from the transfer chamber to a second processing chamber; and forming an upper metal layer on the barrier metal layer in the second processing chamber.
25 . The method of claim 24 , further comprising isolating the first processing chamber and the second processing chamber from the transfer chamber using a gate valve.
26 . The method of claim 24 , wherein forming an upper metal layer includes using a chemical vapor deposition (CVD) technique, an atomic layer deposition (ALD) technique, or a physical vapor deposition (PVD) technique.
27 . The method of claim 24 , further comprising heating the semiconductor substrate in a heating chamber connected to the transfer chamber.
28 . The method of claim 24 , further comprising cooling the semiconductor substrate in a cooling chamber connected to the transfer chamber.
29 . The method of claim 24 , further comprising:
loading the semiconductor substrate into a load lock chamber connected to the transfer chamber prior to flushing the barrier metal layer; transferring the semiconductor substrate from the load lock chamber to the transfer chamber; and transferring the semiconductor substrate from the transfer chamber to the first processing chamber.
30 . The method of claim 24 , further comprising:
after forming the upper metal layer, transferring the semiconductor substrate from the second processing chamber to the transfer chamber; transferring the semiconductor substrate from the transfer chamber to a load lock chamber; and unloading the semiconductor substrate from the load lock chamber.Join the waitlist — get patent alerts
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